ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3

This patch fixes the write-protect control of CPG.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 852fdda843c77aacc3a9be12b1c455179c0bcd1a..e7f0bd7b6581549f41d2277a843f9a2ec8c3c3e7 100644 (file)
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -27,7 +27,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CPGWPCR        0xE6150904
-#define CPGWPR  0xE615090C
+#define CPGWPR  0xE6150900
 
 #define CLK2MHZ(clk)   (clk / 1000 / 1000)
 void s_init(void)
@@ -39,8 +39,8 @@ void s_init(void)
        writel(0xA5A5A500, &rwdt->rwtcsra);
        writel(0xA5A5A500, &swdt->swtcsra);
 
+       writel(0x5A5AFFFF, CPGWPR);
        writel(0xA5A50000, CPGWPCR);
-       writel(0xFFFFFFFF, CPGWPR);
 }
 
 #define GSX_MSTP112            BIT(12) /* 3DG */

diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 00256bc1a3431b444632c75e69da5af52d4f4bdd..746403a5c52cd1f7ab25215a6f575f2dc48adce4 100644 (file)
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -28,7 +28,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CPGWPCR        0xE6150904
-#define CPGWPR  0xE615090C
+#define CPGWPR  0xE6150900
 
 #define CLK2MHZ(clk)   (clk / 1000 / 1000)
 void s_init(void)
@@ -40,8 +40,8 @@ void s_init(void)
        writel(0xA5A5A500, &rwdt->rwtcsra);
        writel(0xA5A5A500, &swdt->swtcsra);
 
+       writel(0x5A5AFFFF, CPGWPR);
        writel(0xA5A50000, CPGWPCR);
-       writel(0xFFFFFFFF, CPGWPR);
 }
 
 #define GSX_MSTP112            BIT(12) /* 3DG */

diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 213e869ebe66827931a5aa60408dd7b4257e1923..dfe8efd3ac4d7b44c518b43f034763d901124a50 100644 (file)
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -27,7 +27,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CPGWPCR        0xE6150904
-#define CPGWPR  0xE615090C
+#define CPGWPR  0xE6150900
 
 #define CLK2MHZ(clk)   (clk / 1000 / 1000)
 void s_init(void)
@@ -39,8 +39,8 @@ void s_init(void)
        writel(0xA5A5A500, &rwdt->rwtcsra);
        writel(0xA5A5A500, &swdt->swtcsra);
 
+       writel(0x5A5AFFFF, CPGWPR);
        writel(0xA5A50000, CPGWPCR);
-       writel(0xFFFFFFFF, CPGWPR);
 }
 
 #define GSX_MSTP112            BIT(12) /* 3DG */