return 0;
for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
- tmp = sclk / (1 << i);
+ tmp = sclk >> i;
if (tmp >= min || i == 0)
break;
}
#endif
}
-static u32 sumo_get_sleep_divider_from_id(u32 id)
-{
- return 1 << id;
-}
-
static void sumo_construct_sclk_voltage_mapping_table(struct amdgpu_device *adev,
struct sumo_sclk_voltage_mapping_table *sclk_voltage_mapping_table,
ATOM_AVAILABLE_SCLK_LIST *table)
return 0;
for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i > 0; i--) {
- temp = sclk / sumo_get_sleep_divider_from_id(i);
+ temp = sclk >> i;
if (temp >= min)
break;
}
PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0);
for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
- temp = clock / (1UL << i);
+ temp = clock >> i;
if (temp >= min || i == 0)
break;
*/
PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0);
for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
- temp = clock / (1UL << i);
+ temp = clock >> i;
if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0)
break;
"Engine clock can't satisfy stutter requirement!", return 0);
for (i = TONGA_MAX_DEEPSLEEP_DIVIDER_ID;; i--) {
- temp = engine_clock / (1 << i);
+ temp = engine_clock >> i;
if(temp >= min || i == 0)
break;