Fix incorrect assertions in bl1_main()
authorAndrew Thoelke <andrew.thoelke@arm.com>
Thu, 11 Jun 2015 13:12:14 +0000 (14:12 +0100)
committerAndrew Thoelke <andrew.thoelke@arm.com>
Fri, 19 Jun 2015 10:29:41 +0000 (11:29 +0100)
The validation of the caching enable state in bl1_main() was
incorrect resulting in the state not being checked. Using the right
operator fixes this.

Change-Id: I2a99478f420281a1dcdf365d3d4fd8394cd21b51

bl1/bl1_main.c

index a5db08557445b21a276a9d289303405ff1fcd2d8..a7a872ced94108d542e96343509a750699e827b8 100644 (file)
@@ -126,9 +126,9 @@ void bl1_main(void)
         * Ensure that MMU/Caches and coherency are turned on
         */
        val = read_sctlr_el3();
-       assert(val | SCTLR_M_BIT);
-       assert(val | SCTLR_C_BIT);
-       assert(val | SCTLR_I_BIT);
+       assert(val & SCTLR_M_BIT);
+       assert(val & SCTLR_C_BIT);
+       assert(val & SCTLR_I_BIT);
        /*
         * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
         * provided platform value