sunxi: enable NAND on C64mini

At the same time, add a patch to support ESMT NANDs correctly,
which is included on the C64mini board.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

diff --git a/target/linux/sunxi/patches-4.19/402-mtd-rawnand-ESMT-retrieve-ECC-requirements.patch b/target/linux/sunxi/patches-4.19/402-mtd-rawnand-ESMT-retrieve-ECC-requirements.patch
new file mode 100644 (file)
index 0000000..e94b45c
--- /dev/null
+++ b/target/linux/sunxi/patches-4.19/402-mtd-rawnand-ESMT-retrieve-ECC-requirements.patch
@@ -0,0 +1,110 @@
+From a68642adbb1a80d1a70a472d01a8a32aaa1a96c4 Mon Sep 17 00:00:00 2001
+From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+Date: Wed, 19 Sep 2018 13:40:49 +0200
+Subject: [PATCH] mtd: rawnand: ESMT: retrieve ECC requirements from 5th id
+ byte
+
+This patch enables support to read the ECC level from the NAND flash
+using ESMT SLC NAND ID byte 5 information as documented e.g. in the
+following data sheet:
+
+https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf
+
+Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+---
+ drivers/mtd/nand/raw/Makefile    |  1 +
+ drivers/mtd/nand/raw/internals.h |  1 +
+ drivers/mtd/nand/raw/nand_esmt.c | 47 ++++++++++++++++++++++++++++++++
+ drivers/mtd/nand/raw/nand_ids.c  |  2 +-
+ 4 files changed, 50 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/raw/nand_esmt.c
+
+diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
+index be2c17863ee59..57159b349054d 100644
+--- a/drivers/mtd/nand/raw/Makefile
++++ b/drivers/mtd/nand/raw/Makefile
+@@ -61,6 +61,7 @@ nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
+ nand-objs += nand_onfi.o
+ nand-objs += nand_jedec.o
+ nand-objs += nand_amd.o
++nand-objs += nand_esmt.o
+ nand-objs += nand_hynix.o
+ nand-objs += nand_macronix.o
+ nand-objs += nand_micron.o
+diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
+index f624b7b804131..04c2cf74eff3e 100644
+--- a/include/linux/mtd/rawnand.h
++++ b/include/linux/mtd/rawnand.h
+@@ -67,6 +67,7 @@ struct nand_manufacturer {
+ extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
+ extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
+ extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
++extern const struct nand_manufacturer_ops esmt_nand_manuf_ops;
+ extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
+ extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
+ extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
+diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
+new file mode 100644
+index 0000000000000..96f039a83bc82
+--- /dev/null
++++ b/drivers/mtd/nand/raw/nand_esmt.c
+@@ -0,0 +1,46 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Copyright (C) 2018 Toradex AG
++ *
++ * Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
++ */
++
++#include <linux/mtd/rawnand.h>
++
++static void esmt_nand_decode_id(struct nand_chip *chip)
++{
++      nand_decode_ext_id(chip);
++
++      /* Extract ECC requirements from 5th id byte. */
++      if (chip->id.len >= 5 && nand_is_slc(chip)) {
++              chip->ecc_step_ds = 512;
++              switch (chip->id.data[4] & 0x3) {
++              case 0x0:
++                      chip->ecc_strength_ds = 4;
++                      break;
++              case 0x1:
++                      chip->ecc_strength_ds = 2;
++                      break;
++              case 0x2:
++                      chip->ecc_strength_ds = 1;
++                      break;
++              default:
++                      WARN(1, "Could not get ECC info");
++                      chip->ecc_step_ds = 0;
++                      break;
++              }
++      }
++}
++
++static int esmt_nand_init(struct nand_chip *chip)
++{
++      if (nand_is_slc(chip))
++              chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
++
++      return 0;
++}
++
++const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
++      .detect = esmt_nand_decode_id,
++      .init = esmt_nand_init,
++};
+diff -ruN a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
+--- a/drivers/mtd/nand/raw/nand_ids.c  2019-02-06 17:30:16.000000000 +0100
++++ b/drivers/mtd/nand/raw/nand_ids.c  2019-02-20 15:43:08.308148769 +0100
+@@ -170,7 +170,7 @@
+ /* Manufacturer IDs */
+ static const struct nand_manufacturer nand_manufacturers[] = {
+       {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
+-      {NAND_MFR_ESMT, "ESMT"},
++      {NAND_MFR_ESMT, "ESMT", &esmt_nand_manuf_ops},
+       {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops},
+       {NAND_MFR_FUJITSU, "Fujitsu"},
+       {NAND_MFR_NATIONAL, "National"},

diff --git a/target/linux/sunxi/patches-4.19/403-dts-add-nand-to-c64mini.patch b/target/linux/sunxi/patches-4.19/403-dts-add-nand-to-c64mini.patch
new file mode 100644 (file)
index 0000000..bfe6099
--- /dev/null
+++ b/target/linux/sunxi/patches-4.19/403-dts-add-nand-to-c64mini.patch
@@ -0,0 +1,62 @@
+diff -ruN a/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts b/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts
+--- a/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts      2019-02-20 16:13:12.000000000 +0100
++++ b/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts      2019-02-22 14:52:35.906512308 +0100
+@@ -175,6 +177,37 @@
+               function = "gpio_in";
+               bias-pull-down;
+       };
++
++      nand_pins: nand-pins {
++              pins = "PC0", "PC1", "PC2", "PC5",
++                     "PC8", "PC9", "PC10", "PC11",
++                     "PC12", "PC13", "PC14", "PC15";
++              function = "nand0";
++      };
++
++      nand_pins_cs0: nand-pins-cs0 {
++              pins = "PC4";
++              function = "nand0";
++              bias-pull-up;
++      };
++
++      nand_pins_cs1: nand-pins-cs1 {
++              pins = "PC3";
++              function = "nand0";
++              bias-pull-up;
++      };
++
++      nand_pins_rb0: nand-pins-rb0 {
++              pins = "PC6";
++              function = "nand0";
++              bias-pull-up;
++      };
++
++      nand_pins_rb1: nand-pins-rb1 {
++              pins = "PC7";
++              function = "nand0";
++              bias-pull-up;
++      };
+ };
+ 
+ &reg_usb0_vbus {
+@@ -210,3 +243,20 @@
+       usb2_vbus-supply = <&reg_usb2_vbus>;
+       status = "okay";
+ };
++
++&nfc {
++      status = "okay";
++      pinctrl-names = "default";
++      pinctrl-0 = <&nand_pins>, <&nand_pins_cs0>, <&nand_pins_rb0>;
++
++      /* ESMT NAND 128MiB 3,3V 8-bit */
++      nand@0 {
++              #address-cells = <1>;
++              #size-cells = <1>;
++              reg = <0>;
++              allwinner,rb = <0>;
++              nand-ecc-mode = "hw";
++              nand-ecc-strength = <16>;
++              nand-ecc-step-size = <1024>;
++      };
++};