drm/amdgpu/powerplay: check MC firmware for FFC support

Check if the MC firmware supports FFC and tell the SMC so
mclk switching is handled properly.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 6bfbfd37ed9265ccdf6f33830d9aa86ac864f536..d94c7d03bf24047d01cd88f081fcfadc462e2955 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4222,9 +4222,17 @@ static int smu7_check_mc_firmware(struct pp_hwmgr *hwmgr)
        if (tmp & (1 << 23)) {
                data->mem_latency_high = MEM_LATENCY_HIGH;
                data->mem_latency_low = MEM_LATENCY_LOW;
+               if ((hwmgr->chip_id == CHIP_POLARIS10) ||
+                   (hwmgr->chip_id == CHIP_POLARIS11) ||
+                   (hwmgr->chip_id == CHIP_POLARIS12))
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableFFC);
        } else {
                data->mem_latency_high = 330;
                data->mem_latency_low = 330;
+               if ((hwmgr->chip_id == CHIP_POLARIS10) ||
+                   (hwmgr->chip_id == CHIP_POLARIS11) ||
+                   (hwmgr->chip_id == CHIP_POLARIS12))
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableFFC);
        }
 
        return 0;