--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
-@@ -135,7 +135,7 @@ static void nvram_read_leddc(const char
+@@ -135,7 +135,7 @@ static void nvram_read_leddc(const char
}
static void nvram_read_macaddr(const char *prefix, const char *name,
}
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
-@@ -180,7 +180,7 @@ static void bcm47xx_fill_sprom_r1234589(
+@@ -181,7 +181,7 @@ static void bcm47xx_fill_sprom_r1234589(
fallback);
nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0,
fallback);
}
static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
-@@ -633,20 +633,20 @@ static void bcm47xx_fill_sprom_path_r45(
+@@ -634,20 +634,20 @@ static void bcm47xx_fill_sprom_path_r45(
static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
{
struct ssb_bus *bus = ssb_gpio_get_bus(chip);
-@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
+@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -486,6 +486,7 @@ struct ssb_bus {
+@@ -33,6 +33,7 @@ struct ssb_sprom {
+ u8 et1phyaddr; /* MII address for enet1 */
+ u8 et0mdcport; /* MDIO for enet0 */
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio;
#define SSB_SPROM_BASE1 0x1000
#define SSB_SPROM_BASE31 0x0800
#define SSB_SPROM_REVISION 0x007E
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
{
struct ssb_bus *bus = ssb_gpio_get_bus(chip);
-@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
+@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}
ssb_bus_may_powerdown(bus);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -486,6 +486,7 @@ struct ssb_bus {
+@@ -33,6 +33,7 @@ struct ssb_sprom {
+ u8 et1phyaddr; /* MII address for enet1 */
+ u8 et0mdcport; /* MDIO for enet0 */
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio;
#endif /* CONFIG_SSB_DRIVER_GIGE */
#endif /* LINUX_SSB_DRIVER_GIGE_H_ */
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
{
struct ssb_bus *bus = ssb_gpio_get_bus(chip);
-@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
+@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}
ssb_bus_may_powerdown(bus);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -486,6 +486,7 @@ struct ssb_bus {
+@@ -33,6 +33,7 @@ struct ssb_sprom {
+ u8 et1phyaddr; /* MII address for enet1 */
+ u8 et0mdcport; /* MDIO for enet0 */
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio;
#endif /* DRIVER_GPIO */
/* Internal-only stuff follows. Do not touch. */
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
--- /dev/null
+commit 4f4aa2ec24dc45881849833a439558d3a378028c
+Author: Rafał Miłecki <zajec5@gmail.com>
+Date: Sun May 18 00:22:38 2014 +0200
+
+ ssb: sprom: add dev_id field for value overriding standard ID
+
+ Some devices may have different features despite sharing the same ID
+ (e.g. PCI ID). For example 14e4:4331 is usually a dual band, but this
+ can be "limited". Device with "pci/x/y/devid=0x4332" supports 2.4 GHz
+ only. Similarly 0x4333 will mean support for 5 GHz only.
+ Add entry in SPROM so info described above can be extracted and stored.
+
+ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+ Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
+--- a/include/linux/ssb/ssb.h
++++ b/include/linux/ssb/ssb.h
+@@ -33,6 +33,7 @@ struct ssb_sprom {
+ u8 et1phyaddr; /* MII address for enet1 */
+ u8 et0mdcport; /* MDIO for enet0 */
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
}
if (updown_tab) {
-@@ -516,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -516,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
}
static void dump_irq(struct ssb_bus *bus)
-@@ -178,9 +199,9 @@ static void ssb_mips_serial_init(struct
+@@ -178,9 +199,9 @@ static void ssb_mips_serial_init(struct
{
struct ssb_bus *bus = mcore->dev->bus;
mcore->nr_serial_ports = ssb_chipco_serial_init(&bus->chipco, mcore->serial_ports);
else
mcore->nr_serial_ports = 0;
-@@ -189,17 +210,42 @@ static void ssb_mips_serial_init(struct
+@@ -189,17 +210,42 @@ static void ssb_mips_serial_init(struct
static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
{
struct ssb_bus *bus = mcore->dev->bus;
sprom_extract_r458(out, in);
/* TODO - get remaining rev 8 stuff needed */
-@@ -641,7 +753,7 @@ static int sprom_extract(struct ssb_bus
+@@ -641,7 +753,7 @@ static int sprom_extract(struct ssb_bus
memset(out, 0, sizeof(*out));
out->revision = in[size - 1] & 0x00FF;
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
-@@ -650,7 +762,7 @@ static int sprom_extract(struct ssb_bus
+@@ -650,7 +762,7 @@ static int sprom_extract(struct ssb_bus
* number stored in the SPROM.
* Always extract r1. */
out->revision = 1;
}
switch (out->revision) {
-@@ -667,9 +779,8 @@ static int sprom_extract(struct ssb_bus
+@@ -667,9 +779,8 @@ static int sprom_extract(struct ssb_bus
sprom_extract_r8(out, in);
break;
default:
#include <linux/ssb/ssb_regs.h>
-@@ -16,19 +18,28 @@ struct pcmcia_device;
+@@ -16,19 +18,29 @@ struct pcmcia_device;
struct ssb_bus;
struct ssb_driver;
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
u16 pa0b0;
-@@ -47,10 +58,10 @@ struct ssb_sprom {
+@@ -47,10 +59,10 @@ struct ssb_sprom {
u8 gpio1; /* GPIO pin 1 */
u8 gpio2; /* GPIO pin 2 */
u8 gpio3; /* GPIO pin 3 */
u8 itssi_a; /* Idle TSSI Target for A-PHY */
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
u8 tri2g; /* 2.4GHz TX isolation */
-@@ -61,8 +72,8 @@ struct ssb_sprom {
+@@ -61,8 +73,8 @@ struct ssb_sprom {
u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
u8 rssisav2g; /* 2GHz RSSI params */
u8 rssismc2g;
u8 rssismf2g;
-@@ -82,16 +93,13 @@ struct ssb_sprom {
+@@ -82,16 +94,13 @@ struct ssb_sprom {
u16 boardflags2_hi; /* Board flags (bits 48-63) */
/* TODO store board flags in a single u64 */
} antenna_gain;
struct {
-@@ -103,14 +111,85 @@ struct ssb_sprom {
+@@ -103,14 +112,85 @@ struct ssb_sprom {
} ghz5;
} fem;
};
-@@ -166,6 +245,7 @@ struct ssb_bus_ops {
+@@ -166,6 +246,7 @@ struct ssb_bus_ops {
#define SSB_DEV_MINI_MACPHY 0x823
#define SSB_DEV_ARM_1176 0x824
#define SSB_DEV_ARM_7TDMI 0x825
/* Vendor-ID values */
#define SSB_VENDOR_BROADCOM 0x4243
-@@ -260,13 +340,61 @@ enum ssb_bustype {
+@@ -260,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
/* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
-@@ -354,7 +482,11 @@ struct ssb_bus {
+@@ -354,7 +483,11 @@ struct ssb_bus {
#ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */
spinlock_t gpio_lock;
}
if (updown_tab) {
-@@ -523,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -523,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
}
static void dump_irq(struct ssb_bus *bus)
-@@ -178,9 +199,9 @@ static void ssb_mips_serial_init(struct
+@@ -178,9 +199,9 @@ static void ssb_mips_serial_init(struct
{
struct ssb_bus *bus = mcore->dev->bus;
mcore->nr_serial_ports = ssb_chipco_serial_init(&bus->chipco, mcore->serial_ports);
else
mcore->nr_serial_ports = 0;
-@@ -189,17 +210,42 @@ static void ssb_mips_serial_init(struct
+@@ -189,17 +210,42 @@ static void ssb_mips_serial_init(struct
static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
{
struct ssb_bus *bus = mcore->dev->bus;
SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
+@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
memset(out, 0, sizeof(*out));
out->revision = in[size - 1] & 0x00FF;
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
-@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
+@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
* number stored in the SPROM.
* Always extract r1. */
out->revision = 1;
}
switch (out->revision) {
-@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
+@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
sprom_extract_r8(out, in);
break;
default:
#include <linux/ssb/ssb_regs.h>
-@@ -24,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
+@@ -24,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom {
u8 revision;
u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
-@@ -338,13 +340,61 @@ enum ssb_bustype {
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -338,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
/* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
-@@ -432,7 +482,11 @@ struct ssb_bus {
+@@ -432,7 +483,11 @@ struct ssb_bus {
#ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */
spinlock_t gpio_lock;
}
if (updown_tab) {
-@@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
return 0;
}
}
-@@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
+@@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
break;
case 43222:
+}
--- a/drivers/ssb/driver_gpio.c
+++ b/drivers/ssb/driver_gpio.c
-@@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct
+@@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct
ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}
}
static void dump_irq(struct ssb_bus *bus)
-@@ -189,34 +210,43 @@ static void ssb_mips_serial_init(struct
+@@ -189,34 +210,43 @@ static void ssb_mips_serial_init(struct
static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
{
struct ssb_bus *bus = mcore->dev->bus;
SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
+@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
memset(out, 0, sizeof(*out));
out->revision = in[size - 1] & 0x00FF;
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
-@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
+@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
* number stored in the SPROM.
* Always extract r1. */
out->revision = 1;
}
switch (out->revision) {
-@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
+@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
sprom_extract_r8(out, in);
break;
default:
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
+@@ -26,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom {
u8 revision;
u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
-@@ -340,13 +340,61 @@ enum ssb_bustype {
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -340,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
}
if (updown_tab) {
-@@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
return 0;
}
}
-@@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
+@@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
break;
case 43222:
SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
+@@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
memset(out, 0, sizeof(*out));
out->revision = in[size - 1] & 0x00FF;
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
-@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
+@@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
* number stored in the SPROM.
* Always extract r1. */
out->revision = 1;
}
switch (out->revision) {
-@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
+@@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
sprom_extract_r8(out, in);
break;
default:
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
+@@ -26,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom {
u8 revision;
u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
-@@ -340,13 +340,61 @@ enum ssb_bustype {
+ u8 et1mdcport; /* MDIO for enet1 */
++ u16 dev_id; /* Device ID overriding e.g. PCI ID */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
+@@ -340,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+ const char *prefix, bool fallback)
+ {
++ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+ nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);