drm/amdgpu add max_memory_clock for interface query (v2)

Add a query for the max memory clock.

v2: handle the dpm enabled case properly

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index b6dd3751d9a5f9461fb3fabb9dfdb4336a6eebf5..3c182b6c5a274ebf083b1cac98a87e6f087663de 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -414,11 +414,15 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
                /* return all clocks in KHz */
                dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
-               if (adev->pm.dpm_enabled)
+               if (adev->pm.dpm_enabled) {
                        dev_info.max_engine_clock =
                                adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;
-               else
+                       dev_info.max_memory_clock =
+                               adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10;
+               } else {
                        dev_info.max_engine_clock = adev->pm.default_sclk * 10;
+                       dev_info.max_memory_clock = adev->pm.default_mclk * 10;
+               }
                dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;
                dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *
                                        adev->gfx.config.max_shader_engines;

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index cd54891b1d5c9fd5289d1f7a736aa2f81fc2b306..420c762f2ed71bd8dadc643e30353e6bef22b585 100644 (file)
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -553,6 +553,7 @@ struct drm_amdgpu_info_device {
        uint32_t num_shader_arrays_per_engine;
        uint32_t gpu_counter_freq; /* in KHz */
        uint64_t max_engine_clock; /* in KHz */
+       uint64_t max_memory_clock; /* in KHz */
        /* cu information */
        uint32_t cu_active_number;
        uint32_t cu_ao_mask;