# CONFIG_ARCH_IXDP2800 is not set
# CONFIG_ARCH_IXDP2401 is not set
# CONFIG_ARCH_IXDP2801 is not set
+# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
#
# Processor Type
CONFIG_ARCH_IXDP2X00=y
# CONFIG_ARCH_IXDP2401 is not set
# CONFIG_ARCH_IXDP2801 is not set
+# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
#
# Processor Type
CONFIG_ARCH_IXDP2401=y
# CONFIG_ARCH_IXDP2801 is not set
CONFIG_ARCH_IXDP2X01=y
+# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
#
# Processor Type
CONFIG_ARCH_IXDP2X00=y
# CONFIG_ARCH_IXDP2401 is not set
# CONFIG_ARCH_IXDP2801 is not set
+# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
#
# Processor Type
# CONFIG_ARCH_IXDP2401 is not set
CONFIG_ARCH_IXDP2801=y
CONFIG_ARCH_IXDP2X01=y
+# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
#
# Processor Type
depends on ARCH_IXDP2401 || ARCH_IXDP2801
default y
+config IXP2000_SUPPORT_BROKEN_PCI_IO
+ bool "Support broken PCI I/O on older IXP2000s"
+ default y
+ help
+ Say 'N' here if you only intend to run your kernel on an
+ IXP2000 B0 or later model and do not need the PCI I/O
+ byteswap workaround. Say 'Y' otherwise.
+
endmenu
endif
void __init
ixp2000_pci_preinit(void)
{
+#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
+ /*
+ * Configure the PCI unit to properly byteswap I/O transactions,
+ * and verify that it worked.
+ */
+ ixp2000_reg_write(IXP2000_PCI_CONTROL,
+ (*IXP2000_PCI_CONTROL | PCI_CONTROL_IEE));
+
+ if ((*IXP2000_PCI_CONTROL & PCI_CONTROL_IEE) == 0)
+ panic("IXP2000: PCI I/O is broken on this ixp model, and "
+ "the needed workaround has not been configured in");
+#endif
+
hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS,
"PCI config cycle to non-existent device");
}
#define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
-#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
/*
- * The IXP2400 before revision B0 asserts byte lanes for PCI I/O
+ * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
* transactions the other way round (MEM transactions don't have this
- * issue), so we need to override the standard functions. B0 and later
- * have a bit that can be set to 1 to get the 'proper' behavior, but
- * since that isn't available on the A? revisions we just keep doing
- * things manually.
+ * issue), so if we want to support those models, we need to override
+ * the standard I/O functions.
+ *
+ * B0 and later have a bit that can be set to 1 to get the proper
+ * behavior for I/O transactions, which then allows us to use the
+ * standard I/O functions. This is what we do if the user does not
+ * explicitly ask for support for pre-B0.
*/
+#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
+#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
+
#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3)
#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2)
#define ioport_map(port, nr) ___io(port)
#define ioport_unmap(addr)
+#else
+#define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
+#endif
#ifdef CONFIG_ARCH_IXDP2X01
#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */
#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */
#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */
-#define PCI_CONTROL_PNR (1 << 17) /* PCI Not Reset bit */
+#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */
#define IXP2000_PCI_RST_REL (1 << 2)
#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF)