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[POWERPC] QE: pario - support for MPC85xx layout
author
Anton Vorontsov
<avorontsov@ru.mvista.com>
Fri, 5 Oct 2007 17:47:09 +0000
(21:47 +0400)
committer
Kumar Gala
<galak@kernel.crashing.org>
Mon, 8 Oct 2007 13:39:01 +0000
(08:39 -0500)
8 bytes padding required to match MPC85xx registers layout.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/sysdev/qe_lib/qe_io.c
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diff --git
a/arch/powerpc/sysdev/qe_lib/qe_io.c
b/arch/powerpc/sysdev/qe_lib/qe_io.c
index a114cb0c572fb46ab90e26ba8f572f7f6a02b608..e53ea4d374a03f52f57c6e9c5e036275fb207c0b 100644
(file)
--- a/
arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/
arch/powerpc/sysdev/qe_lib/qe_io.c
@@
-36,6
+36,9
@@
struct port_regs {
__be32 cpdir2; /* Direction register */
__be32 cppar1; /* Pin assignment register */
__be32 cppar2; /* Pin assignment register */
+#ifdef CONFIG_PPC_85xx
+ u8 pad[8];
+#endif
};
static struct port_regs *par_io = NULL;