drm/i915/fbc: s/gen9 && !glk/gen9_bc || bxt/
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 27 Nov 2019 20:12:17 +0000 (22:12 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 9 Dec 2019 14:10:58 +0000 (16:10 +0200)
Replace the 'gen9 && !glk' with the slightly more obvious
'gen9_bc || bxt'.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191127201222.16669-10-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/display/intel_fbc.c

index 244afc15c7d1fbdb5bdcc7664afea8349de9e336..79218a2dfc425f73757c877f03102142daf74e54 100644 (file)
@@ -281,7 +281,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
        int threshold = dev_priv->fbc.threshold;
 
        /* Display WA #0529: skl, kbl, bxt. */
-       if (IS_GEN(dev_priv, 9) && !IS_GEMINILAKE(dev_priv)) {
+       if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) {
                u32 val = I915_READ(CHICKEN_MISC_4);
 
                val &= ~(FBC_STRIDE_OVERRIDE | FBC_STRIDE_MASK);
@@ -1089,7 +1089,7 @@ void intel_fbc_enable(struct intel_crtc *crtc,
                goto out;
        }
 
-       if (IS_GEN(dev_priv, 9) && !IS_GEMINILAKE(dev_priv) &&
+       if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
            fb->modifier != I915_FORMAT_MOD_X_TILED)
                cache->gen9_wa_cfb_stride =
                        DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;