iwlwifi: TX setup fix confusion between TX queue and TX DMA channel
authorWinkler, Tomas <tomas.winkler@intel.com>
Wed, 19 Nov 2008 23:32:26 +0000 (15:32 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 26 Nov 2008 14:47:39 +0000 (09:47 -0500)
This patch configures correctly TX DMA channel. It is not
the same as TX queue.

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Acked-by: Zhu Yi <yi.zhu@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/iwlwifi/iwl-4965.c
drivers/net/wireless/iwlwifi/iwl-5000.c
drivers/net/wireless/iwlwifi/iwl-tx.c

index b96f553413849dbe22520bf6dafe3d690cc20ec3..60769b12b68525abc24d09a78c6d8ebf49e7e5b7 100644 (file)
@@ -692,9 +692,9 @@ static const u16 default_queue_to_tx_fifo[] = {
 static int iwl4965_alive_notify(struct iwl_priv *priv)
 {
        u32 a;
-       int i = 0;
        unsigned long flags;
        int ret;
+       int i, chan;
 
        spin_lock_irqsave(&priv->lock, flags);
 
@@ -718,6 +718,12 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
        iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
                        priv->scd_bc_tbls.dma >> 10);
 
+       /* Enable DMA channel */
+       for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
+               iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
+                               FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
+                               FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
+
        /* Disable chain mode for all queues */
        iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 
@@ -748,7 +754,7 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
                                 (1 << priv->hw_params.max_txq_num) - 1);
 
        /* Activate all Tx DMA/FIFO channels */
-       priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
+       priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 
        iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 
index 478c5c3674e445d1b74ad04d5cc9bd6b8f821a42..d73760c3f769f2033e2c9a22ecb6385051bb7fcc 100644 (file)
@@ -700,9 +700,9 @@ static int iwl5000_send_wimax_coex(struct iwl_priv *priv)
 static int iwl5000_alive_notify(struct iwl_priv *priv)
 {
        u32 a;
-       int i = 0;
        unsigned long flags;
        int ret;
+       int i, chan;
 
        spin_lock_irqsave(&priv->lock, flags);
 
@@ -725,6 +725,13 @@ static int iwl5000_alive_notify(struct iwl_priv *priv)
 
        iwl_write_prph(priv, IWL50_SCD_DRAM_BASE_ADDR,
                       priv->scd_bc_tbls.dma >> 10);
+
+       /* Enable DMA channel */
+       for (chan = 0; chan < FH50_TCSR_CHNL_NUM ; chan++)
+               iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
+                               FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
+                               FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
+
        iwl_write_prph(priv, IWL50_SCD_QUEUECHAIN_SEL,
                IWL50_SCD_QUEUECHAIN_SEL_ALL(priv->hw_params.max_txq_num));
        iwl_write_prph(priv, IWL50_SCD_AGGR_SEL, 0);
index 9f0705bcd03a6a546c2658e19e45e9fa829b9efd..e045dfeaa1fe973cc0b3336f0634ee5018d8b784 100644 (file)
@@ -449,11 +449,6 @@ static int iwl_hw_tx_queue_init(struct iwl_priv *priv,
        iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
                             txq->q.dma_addr >> 8);
 
-       /* Enable DMA channel, using same id as for TFD queue */
-       iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
-                       FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
-                       FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
-
        iwl_release_nic_access(priv);
        spin_unlock_irqrestore(&priv->lock, flags);