clk: core: Force setting the phase delay when no change

This patch reverts commit 023bd7166be0 ("clk: skip unnecessary
set_phase if nothing to do"), fixing two problems:

* in some SoCs, the hardware phase delay depends on the rate ratio of
  the clock and its parent. So, changing this ratio may imply to set
  new hardware values, even if the logical delay is the same.

* when the delay was the same as previously, an error was returned.

Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Fixes: 023bd7166be0 ("clk: skip unnecessary set_phase if nothing to do")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index d3d26148cdfbc307047bcdc6cc98efd22a88318b..0fb39fe217d17ae1bb681912764b2506007f5f42 100644 (file)
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1908,10 +1908,6 @@ int clk_set_phase(struct clk *clk, int degrees)
 
        clk_prepare_lock();
 
-       /* bail early if nothing to do */
-       if (degrees == clk->core->phase)
-               goto out;
-
        trace_clk_set_phase(clk->core, degrees);
 
        if (clk->core->ops->set_phase)
@@ -1922,7 +1918,6 @@ int clk_set_phase(struct clk *clk, int degrees)
        if (!ret)
                clk->core->phase = degrees;
 
-out:
        clk_prepare_unlock();
 
        return ret;