drm/amdgpu: cleanup skipping IB test on KIQ
authorChristian König <christian.koenig@amd.com>
Mon, 29 Oct 2018 13:56:34 +0000 (14:56 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Nov 2018 19:21:26 +0000 (14:21 -0500)
Instead of hard coding the ring type in the function just never provide
a test_ib callback.

Additional to that remove the emit_ib callback to make sure the nobody
ever tries to execute an IB on the KIQ.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index c514bb9e94a08b87ddeaa7a1bc98c5b6ddfc5699..ec0e6238dbc3678f40021d298064afc8c3b5c7d3 100644 (file)
@@ -351,15 +351,10 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
                struct amdgpu_ring *ring = adev->rings[i];
                long tmo;
 
-               if (!ring->sched.ready)
-                       continue;
-
-               /* skip IB tests for KIQ in general for the below reasons:
-                * 1. We never submit IBs to the KIQ
-                * 2. KIQ doesn't use the EOP interrupts,
-                *    we use some other CP interrupt.
+               /* KIQ rings don't have an IB test because we never submit IBs
+                * to them and they have no interrupt support.
                 */
-               if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
+               if (!ring->sched.ready || !ring->funcs->test_ib)
                        continue;
 
                /* MM engine need more time */
index 45dda5684083fecde9040d40530cd180477ab728..740c73aa7b45a8a127beeab84ec2d16830c6d814 100644 (file)
@@ -6989,10 +6989,8 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = {
                17 + /* gfx_v8_0_ring_emit_vm_flush */
                7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_kiq x3 for user fence, vm fence */
        .emit_ib_size = 4, /* gfx_v8_0_ring_emit_ib_compute */
-       .emit_ib = gfx_v8_0_ring_emit_ib_compute,
        .emit_fence = gfx_v8_0_ring_emit_fence_kiq,
        .test_ring = gfx_v8_0_ring_test_ring,
-       .test_ib = gfx_v8_0_ring_test_ib,
        .insert_nop = amdgpu_ring_insert_nop,
        .pad_ib = amdgpu_ring_generic_pad_ib,
        .emit_rreg = gfx_v8_0_ring_emit_rreg,
index 9248ef08bb379764bb0389bc464721327c237b08..67c011d7f1a62e39871171a6fcb35f6efbfac77f 100644 (file)
@@ -4848,10 +4848,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {
                2 + /* gfx_v9_0_ring_emit_vm_flush */
                8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence, vm fence */
        .emit_ib_size = 4, /* gfx_v9_0_ring_emit_ib_compute */
-       .emit_ib = gfx_v9_0_ring_emit_ib_compute,
        .emit_fence = gfx_v9_0_ring_emit_fence_kiq,
        .test_ring = gfx_v9_0_ring_test_ring,
-       .test_ib = gfx_v9_0_ring_test_ib,
        .insert_nop = amdgpu_ring_insert_nop,
        .pad_ib = amdgpu_ring_generic_pad_ib,
        .emit_rreg = gfx_v9_0_ring_emit_rreg,