ARM: AMBA: Add pclk definition for platforms using primecells
authorRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 15 Jul 2010 10:01:17 +0000 (11:01 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 22 Jul 2010 08:55:38 +0000 (09:55 +0100)
Add a dummy clk definition for the APB pclk signal on all platforms
using the AMBA bus infrastructure.  This ensures that these platforms
continue to work when the core amba bus code controls the APB pclk.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
12 files changed:
arch/arm/mach-bcmring/core.c
arch/arm/mach-ep93xx/clock.c
arch/arm/mach-integrator/core.c
arch/arm/mach-nomadik/clock.c
arch/arm/mach-omap2/clock3xxx_data.c
arch/arm/mach-realview/core.c
arch/arm/mach-spear3xx/clock.c
arch/arm/mach-spear6xx/clock.c
arch/arm/mach-u300/clock.c
arch/arm/mach-ux500/clock.c
arch/arm/mach-versatile/core.c
arch/arm/mach-vexpress/v2m.c

index 72e405df0fb07dd4b363153f149742875725f7ad..d3f959e92b2dd2ef15e129a3bd79e52801811efe 100644 (file)
@@ -91,14 +91,23 @@ static struct clk uart_clk = {
        .parent = &pll1_clk,
 };
 
+static struct clk dummy_apb_pclk = {
+       .name = "BUSCLK",
+       .type = CLK_TYPE_PRIMARY,
+       .mode = CLK_MODE_XTAL,
+};
+
 static struct clk_lookup lookups[] = {
-       {                       /* UART0 */
-        .dev_id = "uarta",
-        .clk = &uart_clk,
-        }, {                   /* UART1 */
-            .dev_id = "uartb",
-            .clk = &uart_clk,
-            }
+       {                       /* Bus clock */
+               .con_id = "apb_pclk",
+               .clk = &dummy_apb_pclk,
+       }, {                    /* UART0 */
+               .dev_id = "uarta",
+               .clk = &uart_clk,
+       }, {                    /* UART1 */
+               .dev_id = "uartb",
+               .clk = &uart_clk,
+       }
 };
 
 static struct amba_device *amba_devs[] __initdata = {
index e29bdef9b2e201ea345c4139487e4895dffad94d..7f3039761d91aecf0c0c46c84424f5ad4c1bf743 100644 (file)
@@ -185,7 +185,7 @@ static struct clk_lookup clocks[] = {
        INIT_CK(NULL,                   "pll1",         &clk_pll1),
        INIT_CK(NULL,                   "fclk",         &clk_f),
        INIT_CK(NULL,                   "hclk",         &clk_h),
-       INIT_CK(NULL,                   "pclk",         &clk_p),
+       INIT_CK(NULL,                   "apb_pclk",     &clk_p),
        INIT_CK(NULL,                   "pll2",         &clk_pll2),
        INIT_CK("ep93xx-ohci",          NULL,           &clk_usb_host),
        INIT_CK("ep93xx-keypad",        NULL,           &clk_keypad),
index b02cfc06e0aeeff452a2c3813523fccd53f1edf2..a04d386098398420359a1ab082b0b77606e40e95 100644 (file)
@@ -119,8 +119,13 @@ static struct clk uartclk = {
        .rate   = 14745600,
 };
 
+static struct clk dummy_apb_pclk;
+
 static struct clk_lookup lookups[] = {
-       {       /* UART0 */
+       {       /* Bus clock */
+               .con_id         = "apb_pclk",
+               .clk            = &dummy_apb_pclk,
+       }, {    /* UART0 */
                .dev_id         = "mb:16",
                .clk            = &uartclk,
        }, {    /* UART1 */
index f035f4185274160757e11d32377509defbdfb1b7..89f793adf77643093c9e465c35447553102ae295 100644 (file)
@@ -53,6 +53,10 @@ static struct clk clk_default;
        }
 
 static struct clk_lookup lookups[] = {
+       {
+               .con_id         = "apb_pclk",
+               .clk            = &clk_default,
+       },
        CLK(&clk_24, "mtu0"),
        CLK(&clk_24, "mtu1"),
        CLK(&clk_48, "uart0"),
index 41b155acfca7cf2605202f78ffbe45a84ebf594a..d33744117ce2488067b50c739afd701623beb315 100644 (file)
@@ -3166,6 +3166,10 @@ static struct clk uart4_ick_am35xx = {
        .recalc         = &followparent_recalc,
 };
 
+static struct clk dummy_apb_pclk = {
+       .name           = "apb_pclk",
+       .ops            = &clkops_null,
+};
 
 /*
  * clkdev
@@ -3173,6 +3177,7 @@ static struct clk uart4_ick_am35xx = {
 
 /* XXX At some point we should rename this file to clock3xxx_data.c */
 static struct omap_clk omap3xxx_clks[] = {
+       CLK(NULL,       "apb_pclk",     &dummy_apb_pclk,        CK_3XXX),
        CLK(NULL,       "omap_32k_fck", &omap_32k_fck,  CK_3XXX),
        CLK(NULL,       "virt_12m_ck",  &virt_12m_ck,   CK_3XXX),
        CLK(NULL,       "virt_13m_ck",  &virt_13m_ck,   CK_3XXX),
index 595be19f8ad5027e29daed72bbe0fb2c5d2d1a04..4aba15f7f812e262ee68655d4bc7b1a9ce503e1c 100644 (file)
@@ -300,8 +300,13 @@ static struct clk ref24_clk = {
        .rate   = 24000000,
 };
 
+static struct clk dummy_apb_pclk;
+
 static struct clk_lookup lookups[] = {
-       {       /* UART0 */
+       {       /* Bus clock */
+               .con_id         = "apb_pclk",
+               .clk            = &dummy_apb_pclk,
+       }, {    /* UART0 */
                .dev_id         = "dev:uart0",
                .clk            = &ref24_clk,
        }, {    /* UART1 */
index 39f6ccf22294d1e8a9c27f90a771a3c0090fa2d5..18febf92f20a10bfe38df87fc75d6c7f23dd9d83 100644 (file)
@@ -341,8 +341,11 @@ static struct clk gpio_clk = {
        .recalc = &follow_parent,
 };
 
+static struct clk dummy_apb_pclk;
+
 /* array of all spear 3xx clock lookups */
 static struct clk_lookup spear_clk_lookups[] = {
+       { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
        /* root clks */
        { .con_id = "osc_32k_clk",      .clk = &osc_32k_clk},
        { .con_id = "osc_24m_clk",      .clk = &osc_24m_clk},
index 13e27c769685018bb82b75b745ca45c56bf6d5d9..36ff056b73219f5b07339ab627558a64eb96adae 100644 (file)
@@ -428,8 +428,11 @@ static struct clk gpio2_clk = {
        .recalc = &follow_parent,
 };
 
+static struct clk dummy_apb_pclk;
+
 /* array of all spear 6xx clock lookups */
 static struct clk_lookup spear_clk_lookups[] = {
+       { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
        /* root clks */
        { .con_id = "osc_32k_clk",      .clk = &osc_32k_clk},
        { .con_id = "osc_30m_clk",      .clk = &osc_30m_clk},
index 5af71d5ba6656c648fc724a36b66e6d419389a1d..5d12d547789e3f17ee993c9df7d8e1056486045b 100644 (file)
@@ -1212,6 +1212,8 @@ static struct clk ppm_clk = {
 };
 #endif
 
+static struct clk dummy_apb_pclk;
+
 #define DEF_LOOKUP(devid, clkref)              \
        {                                       \
        .dev_id = devid,                        \
@@ -1223,6 +1225,10 @@ static struct clk ppm_clk = {
  * look up through clockdevice.
  */
 static struct clk_lookup lookups[] = {
+       {
+               .con_id = "apb_pclk",
+               .clk = &dummy_apb_pclk,
+       },
        /* Connected directly to the AMBA bus */
        DEF_LOOKUP("amba",      &amba_clk),
        DEF_LOOKUP("cpu",       &cpu_clk),
index 0a1318fc8e2bd6c29774bcf1ab8cc48f6a5cfa0c..d8ab7f184fe439ec2492079a063def04c5e3c690 100644 (file)
@@ -453,7 +453,11 @@ static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
 static DEFINE_PRCC_CLK(7, wdg_ed,      1, -1, NULL);
 static DEFINE_PRCC_CLK(7, cfgreg_ed,   0, -1, NULL);
 
+static struct clk clk_dummy_apb_pclk;
+
 static struct clk_lookup u8500_common_clks[] = {
+       CLK(dummy_apb_pclk, NULL,       "apb_pclk"),
+
        /* Peripheral Cluster #1 */
        CLK(gpio0,      "gpio.0",       NULL),
        CLK(gpio0,      "gpio.1",       NULL),
index 3dff8641b03fa7a639d5f886345dad1e84706445..145803c006b45841eea0297b2547ba497b0cc25a 100644 (file)
@@ -400,8 +400,13 @@ static struct clk ref24_clk = {
        .rate   = 24000000,
 };
 
+static struct clk dummy_apb_pclk;
+
 static struct clk_lookup lookups[] = {
-       {       /* UART0 */
+       {       /* AMBA bus clock */
+               .con_id         = "apb_pclk",
+               .clk            = &dummy_apb_pclk,
+       }, {    /* UART0 */
                .dev_id         = "dev:f1",
                .clk            = &ref24_clk,
        }, {    /* UART1 */
index d250711b8c7a4e3c17ee2ddcc53ad5b2e24ee420..d6db3453908b7412b39bf262bb355cc3e3931a07 100644 (file)
@@ -298,8 +298,13 @@ static struct clk osc2_clk = {
        .rate   = 24000000,
 };
 
+static struct clk dummy_apb_pclk;
+
 static struct clk_lookup v2m_lookups[] = {
-       {       /* UART0 */
+       {       /* AMBA bus clock */
+               .con_id         = "apb_pclk",
+               .clk            = &dummy_apb_pclk,
+       }, {    /* UART0 */
                .dev_id         = "mb:uart0",
                .clk            = &osc2_clk,
        }, {    /* UART1 */