{ },
};
-static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
MPP_FUNC_CTRL(0, 65, NULL, armada_370_mpp_ctrl),
};
{ },
};
-static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl),
};
{ },
};
-static struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 59, NULL, armada_38x_mpp_ctrl),
};
{ },
};
-static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl),
};
{ },
};
-static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
};
MPP_GPIO_RANGE(1, 32, 32, 17),
};
-static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};
MPP_GPIO_RANGE(2, 64, 64, 3),
};
-static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};
return 0;
}
-static struct mvebu_mpp_ctrl dove_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl dove_mpp_controls[] = {
MPP_FUNC_CTRL(0, 15, NULL, dove_pmu_mpp_ctrl),
MPP_FUNC_CTRL(16, 23, NULL, dove_mpp_ctrl),
MPP_FUNC_CTRL(24, 39, "mpp_camera", dove_mpp4_ctrl),
MPP_VAR_FUNCTION(0xb, "lcd", "d17", V(0, 0, 0, 0, 1, 0))),
};
-static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
MPP_FUNC_CTRL(0, 44, NULL, kirkwood_mpp_ctrl),
};
MPP_GPIO_RANGE(1, 35, 35, 10),
};
-static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 35, NULL, kirkwood_mpp_ctrl),
};
MPP_GPIO_RANGE(1, 32, 32, 4),
};
-static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 49, NULL, kirkwood_mpp_ctrl),
};
struct mvebu_pinctrl_group {
const char *name;
- struct mvebu_mpp_ctrl *ctrl;
+ const struct mvebu_mpp_ctrl *ctrl;
struct mvebu_mpp_ctrl_setting *settings;
unsigned num_settings;
unsigned gid;
pctl->num_groups = 0;
pctl->desc.npins = 0;
for (n = 0; n < soc->ncontrols; n++) {
- struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
+ const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
pctl->desc.npins += ctrl->npins;
/* initialize control's pins[] array */
/* assign mpp controls to groups */
gid = 0;
for (n = 0; n < soc->ncontrols; n++) {
- struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
+ const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
pctl->groups[gid].gid = gid;
pctl->groups[gid].ctrl = ctrl;
pctl->groups[gid].name = ctrl->name;
*/
struct mvebu_pinctrl_soc_info {
u8 variant;
- struct mvebu_mpp_ctrl *controls;
+ const struct mvebu_mpp_ctrl *controls;
int ncontrols;
struct mvebu_mpp_mode *modes;
int nmodes;
MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
};
-static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
+static const struct mvebu_mpp_ctrl orion_mpp_controls[] = {
MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
};