This patch adds support for the Altera SoCFPGA target.
Both generic target and Terasic SoCkit boards are supported.
Signed-off-by: Marek Vasut <marex@denx.de>
SVN-Revision: 49367
--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=u-boot
+PKG_VERSION:=2016.03
+PKG_RELEASE:=1
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:= \
+ http://mirror2.openwrt.org/sources \
+ ftp://ftp.denx.de/pub/u-boot
+PKG_MD5SUM:=973c1d896be751321cc3aafa564f64b2
+
+PKG_LICENSE:=GPL-2.0 GPL-2.0+
+PKG_LICENSE_FILES:=Licenses/README
+PKG_BUILD_PARALLEL:=1
+
+include $(INCLUDE_DIR)/package.mk
+
+define uboot/Default
+ TITLE:=
+ CONFIG:=
+ IMAGE:=
+endef
+
+define uboot/socfpga_cyclone5_sockit
+ TITLE := U-Boot for Terasic SoCkit board
+ CONFIG := socfpga_sockit
+ IMAGE := u-boot-with-spl.sfp
+endef
+
+UBOOTS := \
+ socfpga_cyclone5_sockit
+
+define Package/uboot/template
+define Package/uboot-socfpga-$(1)
+ SECTION:=boot
+ CATEGORY:=Boot Loaders
+ DEPENDS:=@TARGET_socfpga
+ TITLE:=$(2)
+ URL:=http://www.denx.de/wiki/U-Boot
+ VARIANT:=$(1)
+ MAINTAINER:=Marek Vasut <marex@denx.de>
+endef
+endef
+
+define BuildUBootPackage
+ $(eval $(uboot/Default))
+ $(eval $(uboot/$(1)))
+ $(call Package/uboot/template,$(1),$(TITLE))
+endef
+
+ifdef BUILD_VARIANT
+$(eval $(call uboot/$(BUILD_VARIANT)))
+UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT))
+UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin)
+endif
+
+define Build/Configure
+ +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIG)_config
+endef
+
+define Build/Compile
+ +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) CROSS_COMPILE=$(TARGET_CROSS) $(IMAGE)
+endef
+
+define Package/uboot/install/default
+ $(INSTALL_DIR) $(BIN_DIR)/uboot-$(BOARD)-$(1)
+ $(CP) $(PKG_BUILD_DIR)/u-boot.bin \
+ $(BIN_DIR)/uboot-$(BOARD)-$(1)/openwrt-$(BOARD)-$(1)-u-boot.bin
+ $(CP) $(PKG_BUILD_DIR)/spl/u-boot-spl.bin \
+ $(BIN_DIR)/uboot-$(BOARD)-$(1)/openwrt-$(BOARD)-$(1)-u-boot-spl.bin
+ $(CP) $(PKG_BUILD_DIR)/u-boot-with-spl.sfp \
+ $(BIN_DIR)/uboot-$(BOARD)-$(1)/openwrt-$(BOARD)-$(1)-u-boot-with-spl.sfp
+endef
+
+define Package/uboot/install/template
+define Package/uboot-socfpga-$(1)/install
+ $(call Package/uboot/install/default,$(2))
+endef
+endef
+
+$(foreach u,$(UBOOTS), \
+ $(eval $(call Package/uboot/install/template,$(u),$(u))) \
+)
+
+$(foreach u,$(UBOOTS), \
+ $(eval $(call BuildUBootPackage,$(u))) \
+ $(eval $(call BuildPackage,uboot-socfpga-$(u))) \
+)
--- /dev/null
+From 04a4c90fee75c95130af1e40880c0927d56b0b61 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Sun, 3 Apr 2016 19:11:12 +0200
+Subject: [PATCH 1/2] arm: socfpga: Drop space after 'loadaddr=' in extra env
+
+There is an incorrect space after loadaddr= in the extra environment,
+so drop it.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
+Cc: Chin Liang See <clsee@altera.com>
+---
+ include/configs/socfpga_arria5_socdk.h | 2 +-
+ include/configs/socfpga_cyclone5_socdk.h | 2 +-
+ include/configs/socfpga_de0_nano_soc.h | 2 +-
+ include/configs/socfpga_sockit.h | 2 +-
+ include/configs/socfpga_socrates.h | 2 +-
+ include/configs/socfpga_sr1500.h | 2 +-
+ 6 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
+index a0161bc..153f9f8 100644
+--- a/include/configs/socfpga_arria5_socdk.h
++++ b/include/configs/socfpga_arria5_socdk.h
+@@ -56,7 +56,7 @@
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
+index c4c4ecb..d7c339e 100644
+--- a/include/configs/socfpga_cyclone5_socdk.h
++++ b/include/configs/socfpga_cyclone5_socdk.h
+@@ -56,7 +56,7 @@
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
+index cbc7396..314b9bf 100644
+--- a/include/configs/socfpga_de0_nano_soc.h
++++ b/include/configs/socfpga_de0_nano_soc.h
+@@ -51,7 +51,7 @@
+
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
+index 95e7ba6..07cfcbf 100644
+--- a/include/configs/socfpga_sockit.h
++++ b/include/configs/socfpga_sockit.h
+@@ -52,7 +52,7 @@
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
+index c32a40a..02ea0c5 100644
+--- a/include/configs/socfpga_socrates.h
++++ b/include/configs/socfpga_socrates.h
+@@ -52,7 +52,7 @@
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
+index 6414eeb..e43b5cf 100644
+--- a/include/configs/socfpga_sr1500.h
++++ b/include/configs/socfpga_sr1500.h
+@@ -55,7 +55,7 @@
+
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+- "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
++ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+ "bootm ${loadaddr} - ${fdt_addr}\0" \
+ "bootimage=zImage\0" \
+--
+2.8.0.rc3
+
--- /dev/null
+From 3a0e4875b00e9e487b0081116a81ed17cfd5143f Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Sun, 3 Apr 2016 19:27:23 +0200
+Subject: [PATCH 2/2] arm: socfpga: Tweak SoCkit default env for OpenWRT
+
+Tweak the default environment on SoCFPGA SoCkit to match OpenWRT.
+This means switching to fitImage, which is already available, but
+not used by the environment and weeding out completely dysfunctional
+pieces of the environment.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+---
+ include/configs/socfpga_sockit.h | 20 ++++++--------------
+ 1 file changed, 6 insertions(+), 14 deletions(-)
+
+diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
+index 07cfcbf..5a90105 100644
+--- a/include/configs/socfpga_sockit.h
++++ b/include/configs/socfpga_sockit.h
+@@ -35,7 +35,7 @@
+
+ /* Booting Linux */
+ #define CONFIG_BOOTDELAY 3
+-#define CONFIG_BOOTFILE "fitImage"
++#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_sockit-fit-uImage.itb"
+ #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
+ #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
+ #define CONFIG_LOADADDR 0x01000000
+@@ -51,28 +51,20 @@
+
+ /* Extra Environment */
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+- "verify=n\0" \
+ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+- "bootm ${loadaddr} - ${fdt_addr}\0" \
+- "bootimage=zImage\0" \
+- "fdt_addr=100\0" \
+- "fdtimage=socfpga.dtb\0" \
+- "bootm ${loadaddr} - ${fdt_addr}\0" \
++ "bootm ${loadaddr}\0" \
+ "mmcroot=/dev/mmcblk0p2\0" \
+ "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
+ " root=${mmcroot} rw rootwait;" \
+- "bootz ${loadaddr} - ${fdt_addr}\0" \
+- "mmcload=mmc rescan;" \
+- "load mmc 0:1 ${loadaddr} ${bootimage};" \
+- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
++ "bootm ${loadaddr}\0" \
++ "mmcload=mmc rescan && load mmc 0:2 ${loadaddr} /boot/${bootfile}\0" \
+ "qspiload=sf probe && mtdparts default && run ubiload\0" \
+ "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
+ " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
+- "bootz ${loadaddr} - ${fdt_addr}\0" \
++ "bootz ${loadaddr}\0" \
+ "ubiload=ubi part UBI && ubifsmount ubi0 && " \
+- "ubifsload ${loadaddr} /boot/${bootimage} && " \
+- "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
++ "ubifsload ${loadaddr} /boot/${bootfile}\0"
+
+ /* The rest of the configuration is shared */
+ #include <configs/socfpga_common.h>
+--
+2.8.0.rc3
+
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_mass_storage.ko \
- $(LINUX_DIR)/drivers/usb/gadget/legacy/g_storage.ko
- AUTOLOAD:=$(call AutoLoad,52,usb_f_mass_storage g_storage)
+ $(LINUX_DIR)/drivers/usb/gadget/legacy/g_mass_storage.ko
+ AUTOLOAD:=$(call AutoLoad,52,usb_f_mass_storage g_mass_storage)
$(call AddDepends/usb)
endef
--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=arm
+BOARD:=socfpga
+BOARDNAME:=Altera SoCFPGA
+FEATURES:=display fpu gpio rtc usb usbgadget targz ext4 ubifs ramdisk
+CPU_TYPE:=cortex-a9
+CPU_SUBTYPE:=neon
+MAINTAINER:=Marek Vasut <marex@denx.de>
+DEVICE_TYPE:=other
+
+KERNEL_PATCHVER:=4.4
+KERNELNAME:=zImage dtbs
+
+include $(INCLUDE_DIR)/target.mk
+
+DEFAULT_PACKAGES += \
+ uboot-envtools \
+ ubi-utils \
+ kmod-button-hotplug \
+ kmod-ledtrig-netdev \
+ kmod-usb-core \
+ kmod-usb-dwc2 \
+ kmod-usb-phy-nop \
+ kmod-usb-gadget \
+ kmod-usb-lib-composite \
+ kmod-usb-storage \
+ kmod-usb-storage-gadget \
+ dnsmasq iptables ip6tables \
+ kmod-nf-nathelper firewall \
+ odhcpd odhcp6c
+
+$(eval $(call BuildTarget))
--- /dev/null
+define Package/base-files/install-target
+ rm -f $(1)/etc/config/network
+endef
--- /dev/null
+# MTD device name Device offset Env. size Flash sector size
+/dev/mtd1 0x0 0x1000 0x10000
+/dev/mtd2 0x0 0x1000 0x10000
--- /dev/null
+#!/bin/sh /etc/rc.common
+
+START=99
+
+start() {
+ . /lib/socfpga.sh
+
+ local board=$(socfpga_board_name)
+
+ # Print something nice on the VTcon (the SPI LCD)
+ if [ "${board}" = "socfpga-sockit" ] ; then
+ echo "OpenWRT" > /dev/tty0
+ uci show network.lan.ipaddr > /dev/tty0
+ fi
+}
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+. /lib/socfpga.sh
+
+board=$(socfpga_board_name)
+
+case "$board" in
+"socfpga-sockit")
+ ucidef_set_led_netdev "lan" "LAN" "hps:blue:led0" "eth0"
+ ucidef_set_led_mmc "mmc" "MMC" "hps:blue:led1" "mmc0"
+ ucidef_set_led_default "health" "health" "hps:blue:led2" "1"
+ ucidef_set_led_default "fault" "fault" "hps:blue:led3" "1"
+ ;;
+esac
+
+ucidef_commit_leds
+
+exit 0
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+
+[ -e /etc/config/network ] && exit 0
+
+touch /etc/config/network
+
+. /lib/functions/uci-defaults.sh
+. /lib/socfpga.sh
+
+board=$(socfpga_board_name)
+
+ucidef_set_interface_loopback
+
+case "$board" in
+"socfpga-sockit")
+ ucidef_set_interface_lan 'eth0'
+ ;;
+esac
+
+uci commit network
+
+exit 0
--- /dev/null
+#!/bin/sh
+
+do_socfpga_detect() {
+ . /lib/socfpga.sh
+
+ socfpga_board_detect
+}
+
+boot_hook_add preinit_main do_socfpga_detect
--- /dev/null
+#!/bin/sh
+# Copyright (C) 2015 OpenWrt.org
+
+move_config() {
+ . /lib/socfpga.sh
+ . /lib/upgrade/sockit.sh
+
+ local board=$(socfpga_board_name)
+
+ # Restore configuration
+ if [ "${board}" = "socfpga-sockit" ] ; then
+ mount -o rw,noatime "$CFGPART" /mnt
+ [ -e "/mnt/sysupgrade.tgz" ] && mv -f /mnt/sysupgrade.tgz /
+ umount /mnt
+ fi
+}
+
+boot_hook_add preinit_mount_root move_config
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2010-2013 OpenWrt.org
+#
+
+SOCFPGA_BOARD_NAME=
+SOCFPGA_MODEL=
+
+socfpga_board_detect() {
+ local machine
+ local name
+
+ machine=$(cat /proc/device-tree/model)
+
+ case "$machine" in
+ "Terasic SoCkit")
+ name="socfpga-sockit"
+ ;;
+ *)
+ name="generic"
+ ;;
+ esac
+
+ [ -z "$SOCFPGA_BOARD_NAME" ] && SOCFPGA_BOARD_NAME="$name"
+ [ -z "$SOCFPGA_MODEL" ] && SOCFPGA_MODEL="$machine"
+
+ [ -e "/tmp/sysinfo/" ] || mkdir -p "/tmp/sysinfo/"
+
+ echo "$SOCFPGA_BOARD_NAME" > /tmp/sysinfo/board_name
+ echo "$SOCFPGA_MODEL" > /tmp/sysinfo/model
+}
+
+socfpga_board_name() {
+ local name
+
+ [ -f /tmp/sysinfo/board_name ] || socfpga_board_detect
+ [ -f /tmp/sysinfo/board_name ] && name=$(cat /tmp/sysinfo/board_name)
+
+ # Name is too generic, use model
+ if [ "$name" = "altr,socfpga-cyclone5" ] ; then
+ socfpga_board_detect
+ name=$(cat /tmp/sysinfo/board_name)
+ fi
+
+ [ -z "$name" ] && name="unknown"
+
+ echo "$name"
+}
--- /dev/null
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+
+. /lib/socfpga.sh
+
+RAMFS_COPY_BIN="/bin/mkdir /bin/touch /bin/mknod"
+RAMFS_COPY_DATA=/lib/socfpga.sh
+
+platform_check_image() {
+ local board=$(socfpga_board_name)
+
+ [ "$#" -gt 1 ] && return 1
+
+ case "$board" in
+ "socfpga-sockit")
+ platform_do_check_sockit "$ARGV"
+ return 0;
+ ;;
+ esac
+
+ echo "Sysupgrade is not yet supported on $board."
+ return 1
+}
+
+platform_do_upgrade() {
+ local board=$(socfpga_board_name)
+
+ case "$board" in
+ "socfpga-sockit")
+ platform_do_upgrade_sockit "$ARGV"
+ ;;
+ *)
+ default_do_upgrade "$ARGV"
+ ;;
+ esac
+}
--- /dev/null
+#
+# Copyright (C) 2014-2015 OpenWrt.org
+#
+
+BOOTPART=/dev/mmcblk0p2
+CFGPART=/dev/mmcblk0p3
+
+identify_magic() {
+ local magic=$1
+ case "$magic" in
+ "55424923")
+ echo "ubi"
+ ;;
+ "31181006")
+ echo "ubifs"
+ ;;
+ "68737173")
+ echo "squashfs"
+ ;;
+ "d00dfeed")
+ echo "fit"
+ ;;
+ "00000000")
+ echo "ext4"
+ ;;
+ "4349"*)
+ echo "combined"
+ ;;
+ *)
+ echo "unknown $magic"
+ ;;
+ esac
+}
+
+get_magic_long_tar() {
+ ( tar xf $1 $2 -O | dd bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
+}
+
+identify_tar() {
+ identify_magic $(get_magic_long_tar "$1" "$2")
+}
+
+platform_do_check_sockit() {
+ local board=$(socfpga_board_name)
+ local magic_long="$(get_magic_long "$1")"
+ echo "magic = $magic_long"
+
+ if [ "$magic_long" = "73797375" ] ; then
+ local rootfs_type="$(identify_tar "$1" sysupgrade-$board/root)"
+ if [ "$rootfs_type" = "ubifs" ] ; then
+ nand_do_platform_check $board $1
+ return 0;
+ fi
+ [ "$rootfs_type" = "ext4" ] && return 0
+
+ echo "Unknown rootfs type $rootfs_type !"
+ fi
+
+ return 1
+}
+
+platform_do_upgrade_sockit() {
+ local board=$(socfpga_board_name)
+ local magic_long="$(get_magic_long "$1")"
+ echo "magic = $magic_long"
+
+ if [ "$magic_long" = "73797375" ] ; then
+ local rootfs_type="$(identify_tar "$1" sysupgrade-$board/root)"
+ if [ "$rootfs_type" = "ext4" ] ; then
+ sync
+ tar xf "$1" sysupgrade-$board/root -O | \
+ dd of="$BOOTPART" bs=512 conv=fsync
+ return 0
+ fi
+
+ echo "Unknown rootfs type $rootfs_type !"
+ fi
+
+ return 1
+}
+
+platform_copy_config() {
+ if [ -b "$CFGPART" ]; then
+ mount -o rw,noatime "$CFGPART" /mnt
+ cp -af "$CONF_TAR" /mnt/
+ umount /mnt
+ fi
+}
--- /dev/null
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ALTERA_TSE=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_SG_CHAIN=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+# CONFIG_ARCH_MULTI_CPU_AUTO is not set
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_ARCH_SOCFPGA=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_CCI=y
+CONFIG_ARM_CCI400_COMMON=y
+CONFIG_ARM_CCI400_PMU=y
+CONFIG_ARM_CCI_PMU=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_ARM_ERRATA_643719=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_HEAVY_MB=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_PMU=y
+# CONFIG_ARM_SP805_WATCHDOG is not set
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_AT803X_PHY=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_BLK_CGROUP is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=2
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_SD=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_BOUNCE=y
+CONFIG_BUILD_BIN2C=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CAN=y
+# CONFIG_CAN_8DEV_USB is not set
+CONFIG_CAN_BCM=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_CC770 is not set
+CONFIG_CAN_C_CAN=y
+CONFIG_CAN_C_CAN_PLATFORM=y
+CONFIG_CAN_DEBUG_DEVICES=y
+CONFIG_CAN_DEV=y
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_FLEXCAN is not set
+# CONFIG_CAN_GRCAN is not set
+CONFIG_CAN_GW=y
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_LEDS is not set
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_PEAK_USB is not set
+CONFIG_CAN_RAW=y
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_TI_HECC is not set
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CGROUP_FREEZER is not set
+# CONFIG_CGROUP_NET_CLASSID is not set
+# CONFIG_CGROUP_PERF is not set
+# CONFIG_CGROUP_PIDS is not set
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_OF=y
+CONFIG_CLKSRC_PROBE=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMPACTION=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_COREDUMP=y
+CONFIG_CPUSETS=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_PM=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_DRBG=m
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=m
+CONFIG_CRYPTO_ECHAINIV=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_JITTERENTROPY=m
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_NULL2=m
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_XZ=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+# CONFIG_DEBUG_UART_8250 is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEVKMEM=y
+CONFIG_DEVMEM=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DNS_RESOLVER=y
+# CONFIG_DP83640_PHY is not set
+CONFIG_DTC=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DWMAC_GENERIC=y
+CONFIG_DWMAC_SOCFPGA=y
+# CONFIG_DWMAC_SUNXI is not set
+CONFIG_DW_APB_TIMER=y
+CONFIG_DW_APB_TIMER_OF=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EXPORTFS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_FAT_FS=y
+CONFIG_FB=y
+CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_CMDLINE=y
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_FLEX is not set
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+CONFIG_FB_TFT=y
+# CONFIG_FB_TFT_AGM1264K_FL is not set
+# CONFIG_FB_TFT_BD663474 is not set
+# CONFIG_FB_TFT_FBTFT_DEVICE is not set
+# CONFIG_FB_TFT_HX8340BN is not set
+# CONFIG_FB_TFT_HX8347D is not set
+# CONFIG_FB_TFT_HX8353D is not set
+# CONFIG_FB_TFT_HX8357D is not set
+# CONFIG_FB_TFT_ILI9163 is not set
+# CONFIG_FB_TFT_ILI9320 is not set
+# CONFIG_FB_TFT_ILI9325 is not set
+# CONFIG_FB_TFT_ILI9340 is not set
+# CONFIG_FB_TFT_ILI9341 is not set
+# CONFIG_FB_TFT_ILI9481 is not set
+# CONFIG_FB_TFT_ILI9486 is not set
+# CONFIG_FB_TFT_PCD8544 is not set
+# CONFIG_FB_TFT_RA8875 is not set
+# CONFIG_FB_TFT_S6D02A1 is not set
+# CONFIG_FB_TFT_S6D1121 is not set
+# CONFIG_FB_TFT_SSD1289 is not set
+# CONFIG_FB_TFT_SSD1306 is not set
+# CONFIG_FB_TFT_SSD1331 is not set
+# CONFIG_FB_TFT_SSD1351 is not set
+# CONFIG_FB_TFT_ST7735R is not set
+# CONFIG_FB_TFT_ST7789V is not set
+# CONFIG_FB_TFT_TINYLCD is not set
+# CONFIG_FB_TFT_TLS8204 is not set
+# CONFIG_FB_TFT_UC1611 is not set
+CONFIG_FB_TFT_UC1701=y
+# CONFIG_FB_TFT_UPD161704 is not set
+# CONFIG_FB_TFT_WATTEROTT is not set
+CONFIG_FHANDLE=y
+CONFIG_FIX_EARLYCON_MEM=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x16=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FPGA=y
+CONFIG_FPGA_MGR_SOCFPGA=y
+# CONFIG_FPGA_MGR_ZYNQ_FPGA is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_FRAME_POINTER=y
+CONFIG_FREEZER=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_GARP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_ALTERA=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_MCP23S08=y
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCA953X_IRQ is not set
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GRACE_PERIOD=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_TWD=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZ4=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SMP=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_HOTPLUG_CPU=y
+CONFIG_HWMON=y
+CONFIG_HW_CONSOLE=y
+CONFIG_HW_RANDOM=m
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_FIXED=0
+CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_CORE=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_BUFFER_CB=y
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_TRIGGERED_BUFFER=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INPUT=y
+CONFIG_INPUT_ADXL34X=y
+CONFIG_INPUT_ADXL34X_I2C=y
+CONFIG_INPUT_ADXL34X_SPI=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_INPUT_LEDS=y
+CONFIG_IOMMU_HELPER=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IPV6=y
+# CONFIG_IPV6_GRE is not set
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+# CONFIG_ISDN is not set
+CONFIG_JBD2=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_KERNEL_MODE_NEON is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYS=y
+# CONFIG_LBDAF is not set
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_LIBFDT=y
+CONFIG_LOCKD=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAX1363=y
+CONFIG_MCP4531=y
+CONFIG_MDIO_BOARDINFO=y
+# CONFIG_MEMCG is not set
+CONFIG_MFD_SYSCON=y
+CONFIG_MICREL_PHY=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGHT_HAVE_PCI=y
+CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_DW=y
+# CONFIG_MMC_DW_EXYNOS is not set
+# CONFIG_MMC_DW_K3 is not set
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_MODULES_TREE_LOOKUP=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_FASTMAP=y
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MULTI_IRQ_HANDLER=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NAMESPACES=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEON=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_INGRESS=y
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_GLUE_CT=y
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_MARK=m
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_NAT=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_TARGET_NETMAP=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETWORK_PHY_TIMESTAMPING=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_CLS_CGROUP is not set
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_INGRESS=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_NET_NS=y
+CONFIG_NET_PTP_CLASSIFY=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_VIA is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_V4=y
+CONFIG_NFT_CHAIN_NAT_IPV4=m
+CONFIG_NFT_CHAIN_ROUTE_IPV4=m
+CONFIG_NFT_CHAIN_ROUTE_IPV6=m
+# CONFIG_NFT_COMPAT is not set
+CONFIG_NFT_COUNTER=m
+CONFIG_NFT_CT=m
+CONFIG_NFT_DUP_IPV4=m
+CONFIG_NFT_DUP_IPV6=m
+CONFIG_NFT_EXTHDR=m
+CONFIG_NFT_HASH=m
+CONFIG_NFT_LIMIT=m
+CONFIG_NFT_LOG=m
+CONFIG_NFT_MASQ=m
+CONFIG_NFT_MASQ_IPV4=m
+CONFIG_NFT_META=m
+CONFIG_NFT_NAT=m
+CONFIG_NFT_RBTREE=m
+CONFIG_NFT_REDIR=m
+CONFIG_NFT_REDIR_IPV4=m
+CONFIG_NFT_REJECT=m
+CONFIG_NFT_REJECT_INET=m
+CONFIG_NFT_REJECT_IPV4=m
+CONFIG_NFT_REJECT_IPV6=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_BROADCAST=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_DEFRAG_IPV6=m
+CONFIG_NF_DUP_IPV4=m
+CONFIG_NF_DUP_IPV6=m
+CONFIG_NF_LOG_ARP=m
+CONFIG_NF_LOG_COMMON=m
+CONFIG_NF_LOG_IPV4=m
+CONFIG_NF_LOG_IPV6=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IPV4=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_MASQUERADE_IPV4=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_REDIRECT=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_NF_REJECT_IPV4=m
+CONFIG_NF_REJECT_IPV6=m
+CONFIG_NF_TABLES=m
+CONFIG_NF_TABLES_ARP=m
+# CONFIG_NF_TABLES_BRIDGE is not set
+CONFIG_NF_TABLES_INET=m
+CONFIG_NF_TABLES_IPV4=m
+CONFIG_NF_TABLES_IPV6=m
+CONFIG_NF_TABLES_NETDEV=m
+CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NO_BOOTMEM=y
+CONFIG_NR_CPUS=2
+CONFIG_NTFS_FS=y
+CONFIG_NTFS_RW=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_DYNAMIC=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_RESERVED_MEM=y
+CONFIG_OF_RESOLVE=y
+CONFIG_OID_REGISTRY=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OPROFILE=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS_GENERIC is not set
+# CONFIG_PCI_SYSCALL is not set
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+# CONFIG_PL310_ERRATA_753970 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_PPS=y
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_RCU=y
+CONFIG_PRINTK_TIME=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_PROFILING=y
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_RATIONAL=y
+# CONFIG_RCU_EXPERT is not set
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RING_BUFFER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+CONFIG_ROOT_NFS=y
+CONFIG_RPS=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_SCHED_HRTICK=y
+# CONFIG_SCHED_INFO is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_SENSORS_LM75=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_NR_UARTS=16
+CONFIG_SERIAL_8250_RUNTIME_UARTS=16
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIO=y
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+# CONFIG_SOCFPGA_SUSPEND is not set
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+CONFIG_SPI_ALTERA=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SRAM=y
+CONFIG_SRCU=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWIOTLB=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TRACE_CLOCK=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_XZ=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_USB=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_COMMON=m
+CONFIG_USB_DWC2=m
+CONFIG_USB_DWC2_DUAL_ROLE=y
+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_ETH is not set
+CONFIG_USB_FUNCTIONFS=m
+# CONFIG_USB_FUNCTIONFS_ETH is not set
+CONFIG_USB_FUNCTIONFS_GENERIC=y
+# CONFIG_USB_FUNCTIONFS_RNDIS is not set
+CONFIG_USB_F_ACM=m
+CONFIG_USB_F_ECM=m
+CONFIG_USB_F_FS=m
+CONFIG_USB_F_MASS_STORAGE=m
+CONFIG_USB_F_SS_LB=m
+CONFIG_USB_GADGET=m
+CONFIG_USB_LIBCOMPOSITE=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_OTG=y
+CONFIG_USB_STORAGE=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_U_ETHER=m
+CONFIG_USB_U_SERIAL=m
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ZERO_HNPTEST is not set
+# CONFIG_USERIO is not set
+# CONFIG_USER_NS is not set
+CONFIG_USE_OF=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_VFAT_FS=y
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XPS=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+config SOCFPGA_SD_BOOT_PARTSIZE
+ int "Boot (SD Card) filesystem partition size (in MB)"
+ depends on TARGET_socfpga
+ default 20
+
--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+FAT32_BLOCK_SIZE=1024
+FAT32_BLOCKS=$(shell echo $$(($(CONFIG_SOCFPGA_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
+KDIR_TMP:=$(KDIR)/tmp
+KDIR_TMP_EXT4:=$(KDIR)/tmp-ext4
+
+# Terasic SoCkit: QSPI NOR, N25Q00A
+SOCFPGA_SOCKIT_UBIFS_OPTS="-m 1 -e 65408 -c 2040"
+SOCFPGA_SOCKIT_UBI_OPTS="-m 1 -p 64KiB -s 1"
+
+define sanitize_profile_name
+$(shell echo $(PROFILE) | tr '[:upper:]' '[:lower:]' | sed 's/_/-/g')
+endef
+
+define Image/BuildKernel/Template
+
+ ifneq ($(1),)
+ $(CP) $(DTS_DIR)/$(1).dtb $(BIN_DIR)/$(IMG_PREFIX)-$(1).dtb
+
+ $(call Image/BuildKernel/MkFIT,$(1),$(KDIR)/zImage,$(BIN_DIR)/$(IMG_PREFIX)-$(1).dtb,none,0x00008000,0x00008000)
+ $(CP) $(KDIR)/fit-$(1).itb $(BIN_DIR)/$(IMG_PREFIX)-$(1)-fit-uImage.itb
+
+ ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+ $(call Image/BuildKernel/MkFIT,$(1),$(KDIR)/zImage-initramfs,$(BIN_DIR)/$(IMG_PREFIX)-$(1).dtb,none,0x00008000,0x00008000,-initramfs)
+ $(CP) $(KDIR)/fit-$(1)-initramfs.itb $(BIN_DIR)/$(IMG_PREFIX)-$(1)-fit-uImage-initramfs.itb
+ endif
+ endif
+
+ $(CP) $(KDIR)/zImage $(BIN_DIR)/$(IMG_PREFIX)-zImage
+ $(call Image/BuildKernel/MkuImage, \
+ none, 0x00008000, 0x00008000, \
+ $(BIN_DIR)/$(IMG_PREFIX)-zImage, \
+ $(BIN_DIR)/$(IMG_PREFIX)-uImage \
+ )
+
+ ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+ $(CP) $(KDIR)/zImage-initramfs $(BIN_DIR)/$(IMG_PREFIX)-zImage-initramfs
+ $(call Image/BuildKernel/MkuImage, \
+ none, 0x00008000, 0x00008000, \
+ $(BIN_DIR)/$(IMG_PREFIX)-zImage-initramfs, \
+ $(BIN_DIR)/$(IMG_PREFIX)-uImage-initramfs \
+ )
+ endif
+endef
+
+define Image/InstallKernel/Template
+
+ ifneq ($(CONFIG_TARGET_ROOTFS_INCLUDE_KERNEL)$(CONFIG_TARGET_socfpga_SOCFPGA_SOCKIT),)
+ $(INSTALL_DIR) $(TARGET_DIR)/boot
+ ifneq ($(CONFIG_TARGET_ROOTFS_INCLUDE_UIMAGE)$(CONFIG_TARGET_socfpga_SOCFPGA_SOCKIT),)
+ $(CP) $(BIN_DIR)/$(IMG_PREFIX)-uImage $(TARGET_DIR)/boot/
+ ln -sf $(IMG_PREFIX)-uImage $(TARGET_DIR)/boot/uImage
+ endif
+ ifneq ($(CONFIG_TARGET_ROOTFS_INCLUDE_ZIMAGE),)
+ $(CP) $(BIN_DIR)/$(IMG_PREFIX)-zImage $(TARGET_DIR)/boot/
+ ln -sf $(IMG_PREFIX)-zImage $(TARGET_DIR)/boot/zImage
+ endif
+ ifneq ($(CONFIG_TARGET_ROOTFS_INCLUDE_FIT),)
+ $(foreach dts,$(shell echo $(1)),
+ $(CP) $(BIN_DIR)/$(IMG_PREFIX)-$(dts)-fit-uImage.itb $(TARGET_DIR)/boot/
+ )
+ endif
+ endif
+
+ ifneq ($(CONFIG_TARGET_ROOTFS_INCLUDE_DTB)$(CONFIG_TARGET_socfpga_SOCFPGA_SOCKIT),)
+ $(INSTALL_DIR) $(TARGET_DIR)/boot
+ $(foreach dts,$(shell echo $(1)),
+ $(CP) $(BIN_DIR)/$(IMG_PREFIX)-$(dts).dtb $(TARGET_DIR)/boot/,
+ ln -sf $(IMG_PREFIX)-$(dts).dtb $(TARGET_DIR)/boot/$(dts).dtb
+ )
+ endif
+endef
+
+define Image/Build/SDCard
+
+ ifeq ($(1),ext4)
+ ./gen_socfpga_sdcard_img.sh \
+ $(BIN_DIR)/$(IMG_PREFIX)-$(call sanitize_profile_name)-sdcard-vfat-$(1).img \
+ $(KDIR)/root.$(1) \
+ $(CONFIG_TARGET_ROOTFS_PARTSIZE) \
+ $(BIN_DIR)/uboot-socfpga-$(2)/$(IMG_PREFIX)-$(2)-u-boot-with-spl.sfp \
+ $(KDIR)/cfg.img
+ endif
+endef
+
+define Image/mkfs/targz
+ $(TAR) -czpf $(BIN_DIR)/$(IMG_PREFIX)-$(call sanitize_profile_name)-rootfs.tar.gz --numeric-owner --owner=0 --group=0 -C $(TARGET_DIR)/ .
+endef
+
+Image/BuildKernel/Template/Generic=$(call Image/BuildKernel/Template)
+Image/InstallKernel/Template/Generic=$(call Image/InstallKernel/Template)
+
+Image/BuildKernel/Template/SOCFPGA_SOCKIT=$(foreach dts,$(shell echo $(SOCFPGA_SOCKIT_DTS)),$(call Image/BuildKernel/Template,$(dts)))
+Image/InstallKernel/Template/SOCFPGA_SOCKIT=$(call Image/InstallKernel/Template,$(SOCFPGA_SOCKIT_DTS))
+
+define Image/BuildKernel
+ $(call Image/BuildKernel/Template/$(PROFILE))
+endef
+
+define Image/InstallKernel
+ $(call Image/InstallKernel/Template/$(PROFILE))
+endef
+
+define Image/Build/Profile/SOCFPGA_SOCKIT
+
+ ifeq ($(1),ext4)
+ $(call Image/Build/SDCard,$(1),socfpga_cyclone5_sockit)
+ $(call Image/Build/SysupgradeNAND,$(call sanitize_profile_name),ext4,)
+ endif
+ ifeq ($(1),ubifs)
+ $(call Image/Build/SysupgradeNAND,$(call sanitize_profile_name),ubifs,)
+ endif
+endef
+
+define Image/Build
+ $(if $(Image/Build/$(1)), \
+ $(call Image/Build/$(1),$(1)), \
+ $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(call sanitize_profile_name)-$(1).img \
+ )
+
+ $(if $(Image/Build/Profile/$(PROFILE)), \
+ $(call Image/Build/Profile/$(PROFILE),$(1)), \
+ $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(call sanitize_profile_name)-$(1).img \
+ )
+endef
+
+$(eval $(call BuildImage))
--- /dev/null
+#!/usr/bin/env bash
+
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+set -x
+[ $# -eq 5 ] || {
+ echo "SYNTAX: $0 <file> <rootfs image> <rootfs size> <u-boot image> <cfg image>"
+ exit 1
+}
+
+OUTPUT="$1"
+ROOTFS="$2"
+ROOTFSSIZE="$3"
+UBOOT="$4"
+CFGFS="$5"
+
+head=4
+sect=63
+
+set `ptgen -o $OUTPUT -h $head -s $sect -l 1024 \
+ -t a2 -p 1M \
+ -t 83 -p ${ROOTFSSIZE}M \
+ -t 83 -p 1M`
+
+UBOOTOFFSET="$(($1 / 512))"
+UBOOTSIZE="$(($2 / 512))"
+ROOTFSOFFSET="$(($3 / 512))"
+ROOTFSSIZE="$(($4 / 512))"
+CFGFSOFFSET="$(($5 / 512))"
+CFGFSSIZE="$(($6 / 512))"
+
+dd bs=512 if="$UBOOT" of="$OUTPUT" seek="$UBOOTOFFSET" conv=notrunc
+dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc
+
+mkdosfs "$CFGFS" -C 1024
+dd bs=512 if="$CFGFS" of="$OUTPUT" seek="$CFGFSOFFSET" conv=notrunc
--- /dev/null
+[rootfs]
+# Volume mode (other option is static)
+mode=ubi
+# Source image
+image=root.ubifs
+# Volume ID in UBI image
+vol_id=0
+# Allow for dynamic resize
+vol_type=dynamic
+# Volume name
+vol_name=rootfs
+# Autoresize volume at first mount
+vol_flags=autoresize
--- /dev/null
+From b32732e51a774e8514f40975f2600f02ef9db0b4 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Mon, 29 Feb 2016 17:19:59 +0100
+Subject: [PATCH 1/5] dt-bindings: gpio: altera: Fix altr,interrupt-type
+ property
+
+The altr,interrupt-trigger property is not used by the driver.
+Instead, altr,interrupt-type is used by the driver and the driver
+does not probe if this property is not specified. Therefore, it
+is expected that there are no users of the -trigger property in
+the wild and that this is a typo in the documentation for the
+altera-pio controller. This patch fixes the typo.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Tien Hock Loh <thloh@altera.com>
+Cc: Linus Walleij <linus.walleij@linaro.org>
+---
+ Documentation/devicetree/bindings/gpio/gpio-altera.txt | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/gpio/gpio-altera.txt b/Documentation/devicetree/bindings/gpio/gpio-altera.txt
+index 12f5014..826a720 100644
+--- a/Documentation/devicetree/bindings/gpio/gpio-altera.txt
++++ b/Documentation/devicetree/bindings/gpio/gpio-altera.txt
+@@ -12,7 +12,7 @@ Required properties:
+ - #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
+ - The first cell is the GPIO offset number within the GPIO controller.
+ - interrupts: Specify the interrupt.
+-- altr,interrupt-trigger: Specifies the interrupt trigger type the GPIO
++- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
+ hardware is synthesized. This field is required if the Altera GPIO controller
+ used has IRQ enabled as the interrupt type is not software controlled,
+ but hardware synthesized. Required if GPIO is used as an interrupt
+@@ -35,7 +35,7 @@ gpio_altr: gpio@0xff200000 {
+ reg = <0xff200000 0x10>;
+ interrupts = <0 45 4>;
+ altr,ngpio = <32>;
+- altr,interrupt-trigger = <IRQ_TYPE_EDGE_RISING>;
++ altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <1>;
+--
+2.7.0
+
--- /dev/null
+From e5cbd23e4f40181c907a1abc136b17de8cb86809 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Thu, 17 Dec 2015 23:42:35 +0100
+Subject: [PATCH 2/5] usb: dwc2: gadget: Repair DSTS register decoding
+
+The "enumspd" field is located in register DSTS[2:1], but the code
+which checks the bitfield does not shift the value accordingly. This
+in turn causes incorrect detection of gadget link partner speed in
+dwc2_hsotg_irq_enumdone() .
+
+Shift the value accordingly to fix the problem with speed detection.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Felipe Balbi <balbi@ti.com>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: John Youn <johnyoun@synopsys.com>
+---
+ drivers/usb/dwc2/gadget.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
+index 0abf73c..48e47c1 100644
+--- a/drivers/usb/dwc2/gadget.c
++++ b/drivers/usb/dwc2/gadget.c
+@@ -2095,7 +2095,7 @@ static void dwc2_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg)
+ */
+
+ /* catch both EnumSpd_FS and EnumSpd_FS48 */
+- switch (dsts & DSTS_ENUMSPD_MASK) {
++ switch ((dsts & DSTS_ENUMSPD_MASK) >> DSTS_ENUMSPD_SHIFT) {
+ case DSTS_ENUMSPD_FS:
+ case DSTS_ENUMSPD_FS48:
+ hsotg->gadget.speed = USB_SPEED_FULL;
+--
+2.7.0
+
--- /dev/null
+From 6b8c64eb90e5d958f32524ff2d0571b3b6ac92df Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Mon, 21 Dec 2015 00:42:01 -0600
+Subject: [PATCH 3/5] ARM: socfpga: dts: Enable MMC support at correct place in
+ the DT
+
+The socfpga.dtsi explicitly enabled MMC support, but not all boards are
+equiped with an MMC card. There are setups which only have QSPI NOR.
+Therefore, disable the MMC support on socfpga.dtsi level and enable it
+on per-board basis.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Alan Tull <atull@altera.com>
+Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
+Cc: Marek Vasut <marex@denx.de>
+Cc: Olof Johansson <olof@lixom.net>
+Cc: Thor Thayer <tthayer@altera.com>
+Cc: Vince Bridgers <vbridgers2013@gmail.com>
+Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
+---
+ arch/arm/boot/dts/socfpga.dtsi | 1 +
+ arch/arm/boot/dts/socfpga_arria5_socdk.dts | 1 +
+ arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts | 1 +
+ arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 1 +
+ arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 1 +
+ 5 files changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
+index 39c470e..3ed4abd 100644
+--- a/arch/arm/boot/dts/socfpga.dtsi
++++ b/arch/arm/boot/dts/socfpga.dtsi
+@@ -677,6 +677,7 @@
+ #size-cells = <0>;
+ clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
+ clock-names = "biu", "ciu";
++ status = "disabled";
+ };
+
+ ocram: sram@ffff0000 {
+diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+index a75a666..3c88678 100644
+--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
++++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+@@ -79,6 +79,7 @@
+ &mmc0 {
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
++ status = "okay";
+ };
+
+ &usb1 {
+diff --git a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
+index 555e9ca..afea364 100644
+--- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
++++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
+@@ -100,6 +100,7 @@
+ &mmc0 {
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
++ status = "okay";
+ };
+
+ &uart0 {
+diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+index d4d0a28..15e43f4 100644
+--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
++++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+@@ -84,6 +84,7 @@
+ cd-gpios = <&portb 18 0>;
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
++ status = "okay";
+ };
+
+ &usb1 {
+diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+index 48bf651..b61f22f 100644
+--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
++++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+@@ -80,6 +80,7 @@
+ &mmc0 {
+ vmmc-supply = <®ulator_3_3v>;
+ vqmmc-supply = <®ulator_3_3v>;
++ status = "okay";
+ };
+
+ &usb1 {
+--
+2.7.0
+
--- /dev/null
+From e56e545745dc42cba743dab549d0afb1a39d14b4 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Mon, 22 Jun 2015 23:37:47 +0200
+Subject: [PATCH 4/5] ARM: socfpga: Add support for HPS LEDs on SoCKit
+
+Add support for the blue LEDs on the SoCFPGA SoCkit board.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
+---
+ arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 32 +++++++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+
+diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+index b61f22f..1461690 100644
+--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
++++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+@@ -39,6 +39,34 @@
+ ethernet0 = &gmac1;
+ };
+
++ leds {
++ compatible = "gpio-leds";
++
++ hps_led0 {
++ label = "hps:blue:led0";
++ gpios = <&portb 24 0>; /* HPS_GPIO53 */
++ linux,default-trigger = "heartbeat";
++ };
++
++ hps_led1 {
++ label = "hps:blue:led1";
++ gpios = <&portb 25 0>; /* HPS_GPIO54 */
++ linux,default-trigger = "heartbeat";
++ };
++
++ hps_led2 {
++ label = "hps:blue:led2";
++ gpios = <&portb 26 0>; /* HPS_GPIO55 */
++ linux,default-trigger = "heartbeat";
++ };
++
++ hps_led3 {
++ label = "hps:blue:led3";
++ gpios = <&portb 27 0>; /* HPS_GPIO56 */
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
+ regulator_3_3v: vcc3p3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3P3";
+@@ -61,6 +89,10 @@
+ rxc-skew-ps = <2000>;
+ };
+
++&gpio1 { /* GPIO 30..57 */
++ status = "okay";
++};
++
+ &gpio2 {
+ status = "okay";
+ };
+--
+2.7.0
+
--- /dev/null
+From a953c0800246e99c9b449bd9ec0b26682a82700c Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Tue, 23 Jun 2015 00:41:08 +0200
+Subject: [PATCH 5/5] ARM: socfpga: Add support for HPS KEYs/SWs on SoCKit
+
+Add support for the keys and flip-switches on the SoCFPGA SoCkit board.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
+---
+ arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 62 ++++++++++++++++++++++++++-
+ 1 file changed, 61 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+index 1461690..02e22f5 100644
+--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
++++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+@@ -67,6 +67,62 @@
+ };
+ };
+
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ hps_sw0 {
++ label = "hps_sw0";
++ gpios = <&portc 20 0>; /* HPS_GPI7 */
++ linux,input-type = <5>; /* EV_SW */
++ linux,code = <0x0>; /* SW_LID */
++ };
++
++ hps_sw1 {
++ label = "hps_sw1";
++ gpios = <&portc 19 0>; /* HPS_GPI6 */
++ linux,input-type = <5>; /* EV_SW */
++ linux,code = <0x5>; /* SW_DOCK */
++ };
++
++ hps_sw2 {
++ label = "hps_sw2";
++ gpios = <&portc 18 0>; /* HPS_GPI5 */
++ linux,input-type = <5>; /* EV_SW */
++ linux,code = <0xa>; /* SW_KEYPAD_SLIDE */
++ };
++
++ hps_sw3 {
++ label = "hps_sw3";
++ gpios = <&portc 17 0>; /* HPS_GPI4 */
++ linux,input-type = <5>; /* EV_SW */
++ linux,code = <0xc>; /* SW_ROTATE_LOCK */
++ };
++
++ hps_hkey0 {
++ label = "hps_hkey0";
++ gpios = <&portc 21 1>; /* HPS_GPI8 */
++ linux,code = <187>; /* KEY_F17 */
++ };
++
++ hps_hkey1 {
++ label = "hps_hkey1";
++ gpios = <&portc 22 1>; /* HPS_GPI9 */
++ linux,code = <188>; /* KEY_F18 */
++ };
++
++ hps_hkey2 {
++ label = "hps_hkey2";
++ gpios = <&portc 23 1>; /* HPS_GPI10 */
++ linux,code = <189>; /* KEY_F19 */
++ };
++
++ hps_hkey3 {
++ label = "hps_hkey3";
++ gpios = <&portc 24 1>; /* HPS_GPI11 */
++ linux,code = <190>; /* KEY_F20 */
++ };
++ };
++
+ regulator_3_3v: vcc3p3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3P3";
+@@ -89,11 +145,15 @@
+ rxc-skew-ps = <2000>;
+ };
+
++&gpio0 { /* GPIO 0..29 */
++ status = "okay";
++};
++
+ &gpio1 { /* GPIO 30..57 */
+ status = "okay";
+ };
+
+-&gpio2 {
++&gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+ status = "okay";
+ };
+
+--
+2.7.0
+
--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/Generic
+ NAME:=Generic (default)
+ PACKAGES:=
+endef
+
+define Profile/Generic/Description
+ Package set compatible with most Altera SoCFPGA based boards.
+endef
+
+$(eval $(call Profile,Generic))
--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/SOCFPGA_SOCKIT
+ NAME:=Terasic SoCKit
+ PACKAGES:=uboot-socfpga-socfpga_cyclone5_sockit
+ DEPENDS:=+@TARGET_ROOTFS_INCLUDE_KERNEL +@TARGET_ROOTFS_INCLUDE_DTB
+endef
+
+define Profile/SOCFPGA_SOCKIT/Description
+ The Terasic SoCKit is based on the Altera Cyclone V SoC
+ and offers a large variety of peripherals such as:
+
+ * DDR3
+ * NAND or SPI flash
+ * USB EHCI
+ * USB OTG
+ * User GPIO
+endef
+
+SOCFPGA_SOCKIT_DTS := \
+ socfpga_cyclone5_sockit
+
+$(eval $(call Profile,SOCFPGA_SOCKIT))
projects / openwrt / svn-archive / archive.git / commitdiff