ath10k: fix rfc1042 header retrieval in QCA4019 with eth decap mode
authorVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Mon, 26 Sep 2016 18:56:24 +0000 (21:56 +0300)
committerKalle Valo <kvalo@qca.qualcomm.com>
Tue, 27 Sep 2016 12:15:51 +0000 (15:15 +0300)
Chipset from QCA99X0 onwards (QCA99X0, QCA9984, QCA4019 & future)
rx_hdr_status is not padded to align in 4-byte boundary. Define a
new hw_params field to handle different alignment behaviour between
different hw. This patch fixes improper retrieval of rfc1042 header
with QCA4019. This patch along with "ath10k: Properly remove padding
from the start of rx payload" will fix traffic failure in ethernet
decap mode for QCA4019.

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/htt_rx.c
drivers/net/wireless/ath/ath10k/hw.h

index 3a8984ba9f744f46a20e034306769591d9adf37b..98af0053d30de0efd59b17d0a393ebaf7d96f291 100644 (file)
@@ -68,6 +68,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA9887_HW_1_0_VERSION,
@@ -87,6 +88,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA6174_HW_2_1_VERSION,
@@ -105,6 +107,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA6174_HW_2_1_VERSION,
@@ -123,6 +126,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA6174_HW_3_0_VERSION,
@@ -141,6 +145,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA6174_HW_3_2_VERSION,
@@ -160,6 +165,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -184,6 +190,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                },
                .sw_decrypt_mcast_mgmt = true,
                .hw_ops = &qca99x0_ops,
+               .decap_align_bytes = 1,
        },
        {
                .id = QCA9984_HW_1_0_DEV_VERSION,
@@ -208,6 +215,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                },
                .sw_decrypt_mcast_mgmt = true,
                .hw_ops = &qca99x0_ops,
+               .decap_align_bytes = 1,
        },
        {
                .id = QCA9888_HW_2_0_DEV_VERSION,
@@ -231,6 +239,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                },
                .sw_decrypt_mcast_mgmt = true,
                .hw_ops = &qca99x0_ops,
+               .decap_align_bytes = 1,
        },
        {
                .id = QCA9377_HW_1_0_DEV_VERSION,
@@ -249,6 +258,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA9377_HW_1_1_DEV_VERSION,
@@ -267,6 +277,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                        .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
                },
                .hw_ops = &qca988x_ops,
+               .decap_align_bytes = 4,
        },
        {
                .id = QCA4019_HW_1_0_DEV_VERSION,
@@ -292,6 +303,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                },
                .sw_decrypt_mcast_mgmt = true,
                .hw_ops = &qca99x0_ops,
+               .decap_align_bytes = 1,
        },
 };
 
index a3785a9aa843cddb409cbac8dc2ca661662e83cc..0b4c1562420fcb4535a70538eb5d574b65f83c85 100644 (file)
@@ -1103,6 +1103,7 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
        size_t hdr_len, crypto_len;
        void *rfc1042;
        bool is_first, is_last, is_amsdu;
+       int bytes_aligned = ar->hw_params.decap_align_bytes;
 
        rxd = (void *)msdu->data - sizeof(*rxd);
        hdr = (void *)rxd->rx_hdr_status;
@@ -1119,8 +1120,8 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
                hdr_len = ieee80211_hdrlen(hdr->frame_control);
                crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
 
-               rfc1042 += round_up(hdr_len, 4) +
-                          round_up(crypto_len, 4);
+               rfc1042 += round_up(hdr_len, bytes_aligned) +
+                          round_up(crypto_len, bytes_aligned);
        }
 
        if (is_amsdu)
index 4a01bcff49a76dc16075162272ece9044389d3e6..6038b7486f1dbfafe446593d027bf54b7e23dd36 100644 (file)
@@ -408,6 +408,9 @@ struct ath10k_hw_params {
        bool sw_decrypt_mcast_mgmt;
 
        const struct ath10k_hw_ops *hw_ops;
+
+       /* Number of bytes used for alignment in rx_hdr_status of rx desc. */
+       int decap_align_bytes;
 };
 
 struct htt_rx_desc;