armv8/ls1043aqds: dts: Set SPI mode for DSPI
authorQianyu Gong <qianyu.gong@nxp.com>
Wed, 23 Mar 2016 11:11:36 +0000 (19:11 +0800)
committerYork Sun <york.sun@nxp.com>
Tue, 29 Mar 2016 15:46:24 +0000 (08:46 -0700)
Clock phase and polarity for DSPI flash need to be set.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/dts/fsl-ls1043a-qds.dtsi

index 66efe673d93b7d8f8883e4854c32096077282af2..2e9f1f917c5f74bd8eb5af3fc0871025942936ad 100644 (file)
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "spi-flash";
-               reg = <0>;
                spi-max-frequency = <1000000>; /* input clock */
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
        };
 
        dflash1: sst25wf040b {
@@ -37,6 +39,8 @@
                #size-cells = <1>;
                compatible = "spi-flash";
                spi-max-frequency = <3500000>;
+               spi-cpol;
+               spi-cpha;
                reg = <1>;
        };
 
@@ -45,6 +49,8 @@
                #size-cells = <1>;
                compatible = "spi-flash";
                spi-max-frequency = <3500000>;
+               spi-cpol;
+               spi-cpha;
                reg = <2>;
        };
 };