armv8: ls2080a: Implement workaround for core errata 829520, 833471

829520: Code bounded by indirect conditional branch might corrupt
instruction stream.
Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect
Predictor.

833471: VMSR FPSCR functional failure or deadlock.
Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 2ee60d60f123b9e5f86729c16088a225b086a4fa..67b166c7fd463df009ef13df36b5acb777daaf70 100644 (file)
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -168,6 +168,25 @@ apply_a57_core_errata:
        msr     S3_1_c15_c2_0, x0       /* cpuactlr_el1 */
 #endif
 
+#ifdef CONFIG_ARM_ERRATA_833471
+       mrs     x0, S3_1_c15_c2_0       /* cpuactlr_el1 */
+       /* FPSCR write flush.
+        * Note that in some cases where a flush is unnecessary this
+           could impact performance. */
+       orr     x0, x0, #1 << 38
+       msr     S3_1_c15_c2_0, x0       /* cpuactlr_el1 */
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_829520
+       mrs     x0, S3_1_c15_c2_0       /* cpuactlr_el1 */
+       /* Disable Indirect Predictor bit will prevent this erratum
+           from occurring
+        * Note that in some cases where a flush is unnecessary this
+           could impact performance. */
+       orr     x0, x0, #1 << 4
+       msr     S3_1_c15_c2_0, x0       /* cpuactlr_el1 */
+#endif
+
 #ifdef CONFIG_ARM_ERRATA_833069
        mrs     x0, S3_1_c15_c2_0       /* cpuactlr_el1 */
        /* Disable Enable Invalidates of BTB bit */

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index f1b164fd6a45b6cd7d1831619d0cdb958e763d23..3d8dac13d1cb26e1a4b3a3248d136df280eded3a 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -121,6 +121,10 @@
 #define CONFIG_SYS_FSL_ERRATUM_A009663
 #define CONFIG_SYS_FSL_ERRATUM_A009942
 
+/* ARM A57 CORE ERRATA */
+#define CONFIG_ARM_ERRATA_829520
+#define CONFIG_ARM_ERRATA_833471
+
 #elif defined(CONFIG_LS1043A)
 #define CONFIG_MAX_CPUS                                4
 #define CONFIG_SYS_CACHELINE_SIZE              64