Merge tag 'v3.18-rc7' into for-next

... for allowing more cleanups of hda_intel.c driver-caps where both
upstream and for-next contain the changes.

diff --cc sound/pci/hda/hda_intel.c
index 728663d6746f44921d69c86a6c1a5816d97dd1fd,48b6c5a3884f3b1ed729d542fd286ba2840a938b..fc7aff0eb5621455d7be9cd5a2e20f1fd9811df9
--- 1/sound/pci/hda/hda_intel.c
--- 2/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@@ -302,21 -298,17 +302,22 @@@ enum 
  
  /* quirks for ATI/AMD HDMI */
  #define AZX_DCAPS_PRESET_ATI_HDMI \
-       (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
+       (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
+        AZX_DCAPS_NO_MSI64)
  
 +/* quirks for ATI HDMI with snoop off */
 +#define AZX_DCAPS_PRESET_ATI_HDMI_NS \
 +      (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
 +
  /* quirks for Nvidia */
  #define AZX_DCAPS_PRESET_NVIDIA \
 -      (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
 -       AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
 -       AZX_DCAPS_CORBRP_SELF_CLEAR)
 +      (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | AZX_DCAPS_ALIGN_BUFSIZE |\
 +       AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
 +       AZX_DCAPS_SNOOP_TYPE(NVIDIA))
  
  #define AZX_DCAPS_PRESET_CTHDA \
 -      (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
 +      (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
 +       AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
  
  /*
   * VGA-switcher support

diff --cc sound/pci/hda/hda_priv.h
index 602536c2147dcf540343cf04e3e2368cc407f8e9,5016014e57f2f1dc65f68d5b71db8d12f065493f..a09703a2b2c1816885aac9cad09211db01a2e4fd
--- 1/sound/pci/hda/hda_priv.h
--- 2/sound/pci/hda/hda_priv.h
+++ b/sound/pci/hda/hda_priv.h
@@@ -170,14 -171,8 +170,15 @@@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SD
  #define AZX_DCAPS_PM_RUNTIME  (1 << 26)       /* runtime PM support */
  #define AZX_DCAPS_I915_POWERWELL (1 << 27)    /* HSW i915 powerwell support */
  #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
+ #define AZX_DCAPS_NO_MSI64      (1 << 29)     /* Stick to 32-bit MSIs */
  
 +enum {
 +      AZX_SNOOP_TYPE_NONE ,
 +      AZX_SNOOP_TYPE_SCH,
 +      AZX_SNOOP_TYPE_ATI,
 +      AZX_SNOOP_TYPE_NVIDIA,
 +};
 +
  /* HD Audio class code */
  #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403