static int ath5k_hw_post(struct ath5k_hw *ah)
{
- int i, c;
- u16 cur_reg;
- u16 regs[2] = {AR5K_STA_ID0, AR5K_PHY(8)};
- u32 var_pattern;
- u32 static_pattern[4] = {
+ static const u32 static_pattern[4] = {
0x55555555, 0xaaaaaaaa,
0x66666666, 0x99999999
};
+ static const u16 regs[2] = { AR5K_STA_ID0, AR5K_PHY(8) };
+ int i, c;
+ u16 cur_reg;
+ u32 var_pattern;
u32 init_val;
u32 cur_val;
{
struct ath5k_hw *ah;
struct pci_dev *pdev = sc->pdev;
- u8 mac[ETH_ALEN] = {};
int ret;
u32 srev;
}
/* MAC address is cleared until add_interface */
- ath5k_hw_set_lladdr(ah, mac);
+ ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){});
/* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
memset(ah->ah_bssid, 0xff, ETH_ALEN);
/* Known PCI ids */
-static struct pci_device_id ath5k_pci_id_table[] __devinitdata = {
+static const struct pci_device_id ath5k_pci_id_table[] = {
{ PCI_VDEVICE(ATHEROS, 0x0207), .driver_data = AR5K_AR5210 }, /* 5210 early */
{ PCI_VDEVICE(ATHEROS, 0x0007), .driver_data = AR5K_AR5210 }, /* 5210 */
{ PCI_VDEVICE(ATHEROS, 0x0011), .driver_data = AR5K_AR5211 }, /* 5311 - this is on AHB bus !*/
MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);
/* Known SREVs */
-static struct ath5k_srev_name srev_names[] = {
+static const struct ath5k_srev_name srev_names[] = {
{ "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
{ "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
{ "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
{ "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
};
-static struct ieee80211_rate ath5k_rates[] = {
+static const struct ieee80211_rate ath5k_rates[] = {
{ .bitrate = 10,
.hw_value = ATH5K_RATE_CODE_1M, },
{ .bitrate = 20,
struct ieee80211_bss_conf *bss_conf,
u32 changes);
-static struct ieee80211_ops ath5k_hw_ops = {
+static const struct ieee80211_ops ath5k_hw_ops = {
.tx = ath5k_tx,
.start = ath5k_start,
.stop = ath5k_stop,
/* debugfs: registers */
struct reg {
- char *name;
+ const char *name;
int addr;
};
#define REG_STRUCT_INIT(r) { #r, r }
/* just a few random registers, might want to add more */
-static struct reg regs[] = {
+static const struct reg regs[] = {
REG_STRUCT_INIT(AR5K_CR),
REG_STRUCT_INIT(AR5K_RXDP),
REG_STRUCT_INIT(AR5K_CFG),
static void *reg_start(struct seq_file *seq, loff_t *pos)
{
- return *pos < ARRAY_SIZE(regs) ? ®s[*pos] : NULL;
+ return *pos < ARRAY_SIZE(regs) ? (void *)®s[*pos] : NULL;
}
static void reg_stop(struct seq_file *seq, void *p)
static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
{
++*pos;
- return *pos < ARRAY_SIZE(regs) ? ®s[*pos] : NULL;
+ return *pos < ARRAY_SIZE(regs) ? (void *)®s[*pos] : NULL;
}
static int reg_show(struct seq_file *seq, void *p)
/* debugfs: debug level */
-static struct {
+static const struct {
enum ath5k_debug_level level;
const char *name;
const char *desc;
* index into rates for control rates, we can set it up like this because
* this is only used for AR5212 and we know it supports G mode
*/
-static int control_rates[] =
+static const unsigned int control_rates[] =
{ 0, 1, 1, 1, 4, 4, 6, 6, 8, 8, 8, 8 };
/**