static struct amd_decoder_ops *fam_ops;
+static u8 xec_mask = 0xf;
static u8 nb_err_cpumask = 0xf;
static bool report_gart_errors;
static void amd_decode_dc_mce(struct mce *m)
{
u16 ec = m->status & 0xffff;
- u8 xec = (m->status >> 16) & 0xf;
+ u8 xec = (m->status >> 16) & xec_mask;
pr_emerg(HW_ERR "Data Cache Error: ");
static void amd_decode_ic_mce(struct mce *m)
{
u16 ec = m->status & 0xffff;
- u8 xec = (m->status >> 16) & 0xf;
+ u8 xec = (m->status >> 16) & xec_mask;
pr_emerg(HW_ERR "Instruction Cache Error: ");
static void amd_decode_bu_mce(struct mce *m)
{
u32 ec = m->status & 0xffff;
- u32 xec = (m->status >> 16) & 0xf;
+ u32 xec = (m->status >> 16) & xec_mask;
pr_emerg(HW_ERR "Bus Unit Error");
static void amd_decode_ls_mce(struct mce *m)
{
u16 ec = m->status & 0xffff;
- u8 xec = (m->status >> 16) & 0xf;
+ u8 xec = (m->status >> 16) & xec_mask;
if (boot_cpu_data.x86 == 0x14) {
pr_emerg("You shouldn't be seeing an LS MCE on this cpu family,"
fam_ops->nb_mce = nb_noop_mce;
break;
+ case 0x15:
+ xec_mask = 0x1f;
+ break;
+
default:
printk(KERN_WARNING "Huh? What family is that: %d?!\n",
boot_cpu_data.x86);