ARM: net: bpf: use ldr instructions with shifted rm register
authorRussell King <rmk+kernel@armlinux.org.uk>
Wed, 11 Jul 2018 09:32:17 +0000 (10:32 +0100)
committerDaniel Borkmann <daniel@iogearbox.net>
Thu, 12 Jul 2018 18:45:23 +0000 (20:45 +0200)
Rather than pre-shifting the rm register for the ldr in the tail call,
shift it in the load instruction.  This eliminates one unnecessary
instruction.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
arch/arm/net/bpf_jit_32.c
arch/arm/net/bpf_jit_32.h

index 645653e1931e4b5cd962d690dd7d2caa42954353..e22dc828420cf155779e5054ce2ad54754429a59 100644 (file)
@@ -1096,8 +1096,7 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)
        r_array = arm_bpf_get_reg32(r2[1], tmp2[1], ctx);
        emit(ARM_ADD_I(tmp[1], r_array, off), ctx);
        r_index = arm_bpf_get_reg32(r3[1], tmp2[1], ctx);
-       emit(ARM_MOV_SI(tmp[0], r_index, SRTYPE_ASL, 2), ctx);
-       emit(ARM_LDR_R(tmp[1], tmp[1], tmp[0]), ctx);
+       emit(ARM_LDR_R_SI(tmp[1], tmp[1], r_index, SRTYPE_ASL, 2), ctx);
        emit(ARM_CMP_I(tmp[1], 0), ctx);
        _emit(ARM_COND_EQ, ARM_B(jmp_offset), ctx);
 
index dee8a76fb0bcbfa51b2a656b1144efbb5865b52d..e541a7a6139a8021cbf76804c52600ecd0e9c457 100644 (file)
 #define ARM_LDR_R(rt, rn, rm)  (ARM_INST_LDR_R | ARM_INST_LDST__U \
                                 | (rt) << 12 | (rn) << 16 \
                                 | (rm))
+#define ARM_LDR_R_SI(rt, rn, rm, type, imm) \
+                               (ARM_INST_LDR_R | ARM_INST_LDST__U \
+                                | (rt) << 12 | (rn) << 16 \
+                                | (imm) << 7 | (type) << 5 | (rm))
 #define ARM_LDRB_R(rt, rn, rm) (ARM_INST_LDRB_R | ARM_INST_LDST__U \
                                 | (rt) << 12 | (rn) << 16 \
                                 | (rm))