#define RT2880_SDRAM_BASE 0x08000000
#define RT2880_SYSC_SIZE 0x100
+#define RT2880_TIMER_SIZE 0x100
#define RT2880_INTC_SIZE 0x100
#define RT2880_MEMC_SIZE 0x100
#define RT2880_UART0_SIZE 0x100
#define SYSC_REG_CHIP_NAME1 0x004 /* Chip Name 1 */
#define SYSC_REG_CHIP_ID 0x00c /* Chip Identification */
#define SYSC_REG_SYSTEM_CONFIG 0x010 /* System Configuration */
+#define SYSC_REG_CLKCFG 0x030
#define SYSC_REG_RESET_CTRL 0x034 /* Reset Control*/
#define SYSC_REG_RESET_STATUS 0x038 /* Reset Status*/
#define SYSC_REG_GPIO_MODE 0x060 /* GPIO Purpose Select */
#define SYSTEM_CONFIG_CPUCLK_280 0x2
#define SYSTEM_CONFIG_CPUCLK_300 0x3
+#define CLKCFG_SRAM_CS_N_WDT BIT(9)
+
#define RT2880_RESET_SYSTEM BIT(0)
#define RT2880_RESET_TIMER BIT(1)
#define RT2880_RESET_INTC BIT(2)
platform_device_register(&rt288x_eth_device);
}
+
+static struct resource rt288x_wdt_resources[] = {
+ {
+ .start = RT2880_TIMER_BASE,
+ .end = RT2880_TIMER_BASE + RT2880_TIMER_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device rt288x_wdt_device = {
+ .name = "ramips-wdt",
+ .id = -1,
+ .resource = rt288x_wdt_resources,
+ .num_resources = ARRAY_SIZE(rt288x_wdt_resources),
+};
+
+void __init rt288x_register_wdt(void)
+{
+ u32 t;
+
+ /* enable WDT reset output on pin SRAM_CS_N */
+ t = rt288x_sysc_rr(SYSC_REG_CLKCFG);
+ t |= CLKCFG_SRAM_CS_N_WDT;
+ rt288x_sysc_wr(t, SYSC_REG_CLKCFG);
+
+ platform_device_register(&rt288x_wdt_device);
+}