drm/nouveau/gr/gf100-: virtualise init_40601c
authorBen Skeggs <bskeggs@redhat.com>
Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 18 May 2018 05:01:23 +0000 (15:01 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c

index 1f764df141bd0ad904ec80ae7bbf2ef2a38c8fb4..1b067e600d74a4c955a4e4eb377fde1a63dd063a 100644 (file)
@@ -1914,6 +1914,12 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
        return 0;
 }
 
+void
+gf100_gr_init_40601c(struct gf100_gr *gr)
+{
+       nvkm_wr32(gr->base.engine.subdev.device, 0x40601c, 0xc0000000);
+}
+
 void
 gf100_gr_init_fecs_exceptions(struct gf100_gr *gr)
 {
@@ -2024,7 +2030,10 @@ gf100_gr_init(struct gf100_gr *gr)
        nvkm_wr32(device, 0x404000, 0xc0000000);
        nvkm_wr32(device, 0x404600, 0xc0000000);
        nvkm_wr32(device, 0x408030, 0xc0000000);
-       nvkm_wr32(device, 0x40601c, 0xc0000000);
+
+       if (gr->func->init_40601c)
+               gr->func->init_40601c(gr);
+
        nvkm_wr32(device, 0x404490, 0xc0000000);
        nvkm_wr32(device, 0x406018, 0xc0000000);
        nvkm_wr32(device, 0x405840, 0xc0000000);
@@ -2099,6 +2108,7 @@ gf100_gr = {
        .init_zcull = gf100_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf100_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,
index ff3e265925c533e5c3b40fbdc16baa8d76c8f1d2..8c42a7aff1839f0a11fde03aec4656e25e978f7c 100644 (file)
@@ -132,6 +132,7 @@ struct gf100_gr_func {
        void (*init_swdx_pes_mask)(struct gf100_gr *);
        void (*init_fecs_exceptions)(struct gf100_gr *);
        void (*init_ds_hww_esr_2)(struct gf100_gr *);
+       void (*init_40601c)(struct gf100_gr *);
        void (*init_ppc_exceptions)(struct gf100_gr *);
        void (*set_hww_esr_report_mask)(struct gf100_gr *);
        const struct gf100_gr_pack *mmio;
@@ -154,6 +155,7 @@ void gf100_gr_init_vsc_stream_master(struct gf100_gr *);
 void gf100_gr_init_zcull(struct gf100_gr *);
 void gf100_gr_init_num_active_ltcs(struct gf100_gr *);
 void gf100_gr_init_fecs_exceptions(struct gf100_gr *);
+void gf100_gr_init_40601c(struct gf100_gr *);
 
 void gf117_gr_init_zcull(struct gf100_gr *);
 
index f76995b54eabb326e6c8f280463fed8a2f043d6f..61d6eef70e6895b74e92e31f0aafda644d6d7359 100644 (file)
@@ -120,6 +120,7 @@ gf104_gr = {
        .init_zcull = gf100_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf104_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,
index ada2697a075a9f1be065a31085467a16557ed102..d4f712e7d6e97d6948b79cf640eae6e9f0ec6c23 100644 (file)
@@ -118,6 +118,7 @@ gf108_gr = {
        .init_zcull = gf100_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf108_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,
index 80ced8fc2e3ebac39e0c6658640ba15125cdafb2..1b6c2f32ec921198e89e71ae344b027e65608edc 100644 (file)
@@ -92,6 +92,7 @@ gf110_gr = {
        .init_zcull = gf100_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf110_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,
index 37ca1216372c19a4ca37e6e68acaa8d3edeb8b03..ae76e8183d1d175896e6137c0648029f29d28a89 100644 (file)
@@ -156,6 +156,7 @@ gf117_gr = {
        .init_zcull = gf117_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf117_gr_pack_mmio,
        .fecs.ucode = &gf117_gr_fecs_ucode,
        .gpccs.ucode = &gf117_gr_gpccs_ucode,
index ddf05c5fa2fc560613bd251b20124e706e6c74e4..a3970c31f95170e3fc70f8aa3cf6495fa9ff13d2 100644 (file)
@@ -183,6 +183,7 @@ gf119_gr = {
        .init_zcull = gf100_gr_init_zcull,
        .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
        .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
+       .init_40601c = gf100_gr_init_40601c,
        .mmio = gf119_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,