Blackfin: SIC: BF537: change default data/error relative priorities

Some peripherals might generate an error interrupt shortly after the
data interrupt due to the fact that the peripheral isn't serviced fast
enough.  In most cases this isn't a problem and is expected behavior.
This hasn't been a problem on most parts since you simply don't request
the error interrupt (or you leave it disabled while there is an expected
state) and do the peripheral status checking in the data interrupt.

The Blackfin SIC allows people to prioritize data and error interrupts,
and the Blackfin CEC allows interrupts of equal or higher priority to
nest.  The current default settings gives error interrupts a higher
priority than data interrupts.  So if an error occurs while processing
the data interrupt, it will be serviced immediately.

However, the error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis.  Once the error interrupt is enabled for one
peripheral, it is automatically enabled for all peripherals.

Therefore lower the default multiplexed error interrupt priority so
most people need not worry themselves with this issue.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/arch/blackfin/mach-bf537/Kconfig b/arch/blackfin/mach-bf537/Kconfig
index d81224f9d723d0f8e3b27ea8d558ec1389e77f1f..08b2b343ccecdfd825de3e3b35faf6bc3f71072c 100644 (file)
--- a/arch/blackfin/mach-bf537/Kconfig
+++ b/arch/blackfin/mach-bf537/Kconfig
@@ -14,8 +14,8 @@ config IRQ_DMA_ERROR
        int "IRQ_DMA_ERROR Generic"
        default 7
 config IRQ_ERROR
-       int "IRQ_ERROR: CAN MAC SPORT0 SPORT1 SPI UART0 UART1"
-       default 7
+       int "IRQ_ERROR: PPI CAN MAC SPORT0 SPORT1 SPI UART0 UART1"
+       default 11
 config IRQ_RTC
        int "IRQ_RTC"
        default 8