-LINUX_VERSION-6.1 = .82
-LINUX_KERNEL_HASH-6.1.82 = d150d2d9d416877668d8b56f75759f166168d192419eefaa942ed67225cbec06
+LINUX_VERSION-6.1 = .83
+LINUX_KERNEL_HASH-6.1.83 = 88b69611093613ce4494527685f833af0c31b986dcbeda7086f69f18f9e0b190
obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -1593,6 +1593,12 @@ config GPIO_SODAVILLE
+@@ -1594,6 +1594,12 @@ config GPIO_SODAVILLE
help
Say Y here to support Intel Sodaville GPIO.
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -1243,6 +1243,15 @@ config HTC_EGPIO
+@@ -1244,6 +1244,15 @@ config HTC_EGPIO
several HTC phones. It provides basic support for input
pins, output pins, and IRQs.
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
-@@ -265,13 +265,6 @@ int usb_phy_gen_create_phy(struct device
- return -EPROBE_DEFER;
- }
+@@ -272,13 +272,6 @@ int usb_phy_gen_create_phy(struct device
+ return dev_err_probe(dev, PTR_ERR(nop->vbus_draw),
+ "could not get vbus regulator\n");
- nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus");
- if (PTR_ERR(nop->vbus_draw) == -ENODEV)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
-@@ -283,6 +283,11 @@
+@@ -280,6 +280,11 @@
#address-cells = <1>;
#size-cells = <1>;
};
soc {
-@@ -531,6 +537,18 @@
+@@ -528,6 +534,18 @@
#size-cells = <0>;
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
-@@ -596,6 +596,7 @@
+@@ -593,6 +593,7 @@
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand_ctlrdy";
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
-@@ -343,7 +343,7 @@
+@@ -340,7 +340,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
.mac_link_down = prestera_mac_link_down,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -654,7 +654,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -653,7 +653,6 @@ static void mtk_mac_link_up(struct phyli
}
static const struct phylink_mac_ops mtk_phylink_ops = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4333,6 +4333,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4332,6 +4332,7 @@ static const struct mtk_soc_data mt7986_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7986_CLKS_BITMAP,
.required_pctl = false,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3480,11 +3480,8 @@ static void mtk_pending_work(struct work
+@@ -3479,11 +3479,8 @@ static void mtk_pending_work(struct work
rtnl_lock();
dev_dbg(eth->dev, "[%s][%d] reset\n", __func__, __LINE__);
/* stop all devices to make sure that dma is properly shut down */
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!eth->netdev[i])
-@@ -3518,7 +3515,7 @@ static void mtk_pending_work(struct work
+@@ -3517,7 +3514,7 @@ static void mtk_pending_work(struct work
dev_dbg(eth->dev, "[%s][%d] reset done\n", __func__, __LINE__);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3256,6 +3256,27 @@ static void mtk_set_mcr_max_rx(struct mt
+@@ -3255,6 +3255,27 @@ static void mtk_set_mcr_max_rx(struct mt
mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
}
static int mtk_hw_init(struct mtk_eth *eth)
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-@@ -3295,22 +3316,9 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3294,22 +3315,9 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3277,7 +3277,54 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3276,7 +3276,54 @@ static void mtk_hw_reset(struct mtk_eth
0x3ffffff);
}
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
ETHSYS_DMA_AG_MAP_PPE;
-@@ -3316,7 +3363,12 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3315,7 +3362,12 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
/* Set FE to PDMAv2 if necessary */
-@@ -3507,7 +3559,7 @@ static void mtk_pending_work(struct work
+@@ -3506,7 +3558,7 @@ static void mtk_pending_work(struct work
if (eth->dev->pins)
pinctrl_select_state(eth->dev->pins->p,
eth->dev->pins->default_state);
/* restart DMA and enable IRQs */
for (i = 0; i < MTK_MAC_COUNT; i++) {
-@@ -4109,7 +4161,7 @@ static int mtk_probe(struct platform_dev
+@@ -4108,7 +4160,7 @@ static int mtk_probe(struct platform_dev
eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE);
INIT_WORK(ð->pending_work, mtk_pending_work);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2844,14 +2844,29 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2843,14 +2843,29 @@ static void mtk_dma_free(struct mtk_eth
kfree(eth->scratch_head);
}
schedule_work(ð->pending_work);
}
-@@ -3331,15 +3346,17 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3330,15 +3345,17 @@ static int mtk_hw_init(struct mtk_eth *e
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
int i, val, ret;
if (eth->ethsys)
regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask,
-@@ -3468,8 +3485,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3467,8 +3484,10 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
err_disable_pm:
return ret;
}
-@@ -3531,30 +3550,53 @@ static int mtk_do_ioctl(struct net_devic
+@@ -3530,30 +3549,53 @@ static int mtk_do_ioctl(struct net_devic
return -EOPNOTSUPP;
}
if (eth->dev->pins)
pinctrl_select_state(eth->dev->pins->p,
-@@ -3565,15 +3607,19 @@ static void mtk_pending_work(struct work
+@@ -3564,15 +3606,19 @@ static void mtk_pending_work(struct work
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!test_bit(i, &restart))
continue;
};
/* strings used by ethtool */
-@@ -3339,6 +3345,102 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3338,6 +3344,102 @@ static void mtk_hw_warm_reset(struct mtk
val, rst_mask);
}
static int mtk_hw_init(struct mtk_eth *eth, bool reset)
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-@@ -3657,6 +3759,7 @@ static int mtk_cleanup(struct mtk_eth *e
+@@ -3656,6 +3758,7 @@ static int mtk_cleanup(struct mtk_eth *e
mtk_unreg_dev(eth);
mtk_free_dev(eth);
cancel_work_sync(ð->pending_work);
return 0;
}
-@@ -4094,6 +4197,7 @@ static int mtk_probe(struct platform_dev
+@@ -4093,6 +4196,7 @@ static int mtk_probe(struct platform_dev
eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
INIT_WORK(ð->rx_dim.work, mtk_dim_rx);
eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
INIT_WORK(ð->tx_dim.work, mtk_dim_tx);
-@@ -4296,6 +4400,8 @@ static int mtk_probe(struct platform_dev
+@@ -4295,6 +4399,8 @@ static int mtk_probe(struct platform_dev
netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_napi_rx);
platform_set_drvdata(pdev, eth);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3688,6 +3688,11 @@ static void mtk_pending_work(struct work
+@@ -3687,6 +3687,11 @@ static void mtk_pending_work(struct work
set_bit(MTK_RESETTING, ð->state);
mtk_prepare_for_reset(eth);
/* stop all devices to make sure that dma is properly shut down */
for (i = 0; i < MTK_MAC_COUNT; i++) {
-@@ -3725,6 +3730,8 @@ static void mtk_pending_work(struct work
+@@ -3724,6 +3729,8 @@ static void mtk_pending_work(struct work
clear_bit(MTK_RESETTING, ð->state);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -944,7 +944,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -943,7 +943,7 @@ static int mtk_init_fq_dma(struct mtk_et
{
const struct mtk_soc_data *soc = eth->soc;
dma_addr_t phy_ring_tail;
dma_addr_t dma_addr;
int i;
-@@ -2208,19 +2208,25 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2207,19 +2207,25 @@ static int mtk_tx_alloc(struct mtk_eth *
struct mtk_tx_ring *ring = ð->tx_ring;
int i, sz = soc->txrx.txd_size;
struct mtk_tx_dma_v2 *txd;
u32 next_ptr = ring->phys + next * sz;
txd = ring->dma + i * sz;
-@@ -2240,22 +2246,22 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2239,22 +2245,22 @@ static int mtk_tx_alloc(struct mtk_eth *
* descriptors in ring->dma_pdma.
*/
if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
ring->thresh = MAX_SKB_FRAGS;
/* make sure that all changes to the dma ring are flushed before we
-@@ -2267,14 +2273,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2266,14 +2272,14 @@ static int mtk_tx_alloc(struct mtk_eth *
mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr);
mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr);
mtk_w32(eth,
mtk_w32(eth, 0, MT7628_TX_CTX_IDX0);
mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx);
}
-@@ -2292,7 +2298,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2291,7 +2297,7 @@ static void mtk_tx_clean(struct mtk_eth
int i;
if (ring->buf) {
mtk_tx_unmap(eth, &ring->buf[i], NULL, false);
kfree(ring->buf);
ring->buf = NULL;
-@@ -2300,14 +2306,14 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2299,14 +2305,14 @@ static void mtk_tx_clean(struct mtk_eth
if (ring->dma) {
dma_free_coherent(eth->dma_dev,
ring->dma_pdma, ring->phys_pdma);
ring->dma_pdma = NULL;
}
-@@ -2832,7 +2838,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2831,7 +2837,7 @@ static void mtk_dma_free(struct mtk_eth
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
dma_free_coherent(eth->dma_dev,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4479,7 +4479,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4478,7 +4478,7 @@ static const struct mtk_soc_data mt7621_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.hash_offset = 2,
.foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
.txrx = {
-@@ -4518,7 +4518,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4517,7 +4517,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
},
.gdm1_cnt = 0x1c00,
.gdma_to_ppe = 0x3333,
-@@ -620,6 +624,75 @@ static void mtk_mac_link_down(struct phy
+@@ -619,6 +623,75 @@ static void mtk_mac_link_down(struct phy
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
static void mtk_mac_link_up(struct phylink_config *config,
struct phy_device *phy,
unsigned int mode, phy_interface_t interface,
-@@ -645,6 +718,8 @@ static void mtk_mac_link_up(struct phyli
+@@ -644,6 +717,8 @@ static void mtk_mac_link_up(struct phyli
break;
}
/* Configure duplex */
if (duplex == DUPLEX_FULL)
mcr |= MAC_MCR_FORCE_DPX;
-@@ -1105,7 +1180,8 @@ static void mtk_tx_set_dma_desc_v1(struc
+@@ -1104,7 +1179,8 @@ static void mtk_tx_set_dma_desc_v1(struc
WRITE_ONCE(desc->txd1, info->addr);
if (info->last)
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
-@@ -1139,9 +1215,6 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1138,9 +1214,6 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -1185,11 +1258,12 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1184,11 +1257,12 @@ static int mtk_tx_map(struct sk_buff *sk
.gso = gso,
.csum = skb->ip_summed == CHECKSUM_PARTIAL,
.vlan = skb_vlan_tag_present(skb),
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
const struct mtk_soc_data *soc = eth->soc;
-@@ -1197,8 +1271,10 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1196,8 +1270,10 @@ static int mtk_tx_map(struct sk_buff *sk
struct mtk_tx_dma *itxd_pdma, *txd_pdma;
struct mtk_tx_buf *itx_buf, *tx_buf;
int i, n_desc = 1;
itxd = ring->next_free;
itxd_pdma = qdma_to_pdma(ring, itxd);
if (itxd == ring->last_free)
-@@ -1247,7 +1323,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1246,7 +1322,7 @@ static int mtk_tx_map(struct sk_buff *sk
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.size = min_t(unsigned int, frag_size,
soc->txrx.dma_max_len);
txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
!(frag_size - txd_info.size);
txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
-@@ -1286,7 +1362,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1285,7 +1361,7 @@ static int mtk_tx_map(struct sk_buff *sk
txd_pdma->txd2 |= TX_DMA_LS1;
}
skb_tx_timestamp(skb);
ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2);
-@@ -1298,8 +1374,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1297,8 +1373,7 @@ static int mtk_tx_map(struct sk_buff *sk
wmb();
if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr);
} else {
int next_idx;
-@@ -1368,7 +1443,7 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1367,7 +1442,7 @@ static void mtk_wake_queue(struct mtk_et
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!eth->netdev[i])
continue;
}
}
-@@ -1392,7 +1467,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1391,7 +1466,7 @@ static netdev_tx_t mtk_start_xmit(struct
tx_num = mtk_cal_txd_req(eth, skb);
if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
netif_err(eth, tx_queued, dev,
"Tx Ring full when queue awake!\n");
spin_unlock(ð->page_lock);
-@@ -1418,7 +1493,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1417,7 +1492,7 @@ static netdev_tx_t mtk_start_xmit(struct
goto drop;
if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
spin_unlock(ð->page_lock);
-@@ -1585,10 +1660,12 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1584,10 +1659,12 @@ static int mtk_xdp_submit_frame(struct m
struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf);
const struct mtk_soc_data *soc = eth->soc;
struct mtk_tx_ring *ring = ð->tx_ring;
};
int err, index = 0, n_desc = 1, nr_frags;
struct mtk_tx_buf *htx_buf, *tx_buf;
-@@ -1638,6 +1715,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1637,6 +1714,7 @@ static int mtk_xdp_submit_frame(struct m
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.size = skb_frag_size(&sinfo->frags[index]);
txd_info.last = index + 1 == nr_frags;
data = skb_frag_address(&sinfo->frags[index]);
index++;
-@@ -1992,8 +2070,46 @@ rx_done:
+@@ -1991,8 +2069,46 @@ rx_done:
return done;
}
{
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
struct mtk_tx_ring *ring = ð->tx_ring;
-@@ -2025,12 +2141,9 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2024,12 +2140,9 @@ static int mtk_poll_tx_qdma(struct mtk_e
break;
if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) {
budget--;
}
mtk_tx_unmap(eth, tx_buf, &bq, true);
-@@ -2049,7 +2162,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2048,7 +2161,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
}
static int mtk_poll_tx_pdma(struct mtk_eth *eth, int budget,
{
struct mtk_tx_ring *ring = ð->tx_ring;
struct mtk_tx_buf *tx_buf;
-@@ -2067,12 +2180,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -2066,12 +2179,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
break;
if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) {
budget--;
}
mtk_tx_unmap(eth, tx_buf, &bq, true);
-@@ -2094,26 +2203,15 @@ static int mtk_poll_tx(struct mtk_eth *e
+@@ -2093,26 +2202,15 @@ static int mtk_poll_tx(struct mtk_eth *e
{
struct mtk_tx_ring *ring = ð->tx_ring;
struct dim_sample dim_sample = {};
dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes,
&dim_sample);
-@@ -2123,7 +2221,7 @@ static int mtk_poll_tx(struct mtk_eth *e
+@@ -2122,7 +2220,7 @@ static int mtk_poll_tx(struct mtk_eth *e
(atomic_read(&ring->free_count) > ring->thresh))
mtk_wake_queue(eth);
}
static void mtk_handle_status_irq(struct mtk_eth *eth)
-@@ -2209,6 +2307,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2208,6 +2306,7 @@ static int mtk_tx_alloc(struct mtk_eth *
int i, sz = soc->txrx.txd_size;
struct mtk_tx_dma_v2 *txd;
int ring_size;
if (MTK_HAS_CAPS(soc->caps, MTK_QDMA))
ring_size = MTK_QDMA_RING_SIZE;
-@@ -2276,8 +2375,25 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2275,8 +2374,25 @@ static int mtk_tx_alloc(struct mtk_eth *
ring->phys + ((ring_size - 1) * sz),
soc->reg_map->qdma.crx_ptr);
mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
} else {
mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
mtk_w32(eth, ring_size, MT7628_TX_MAX_CNT0);
-@@ -2962,7 +3078,7 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2961,7 +3077,7 @@ static int mtk_start_dma(struct mtk_eth
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
else
val |= MTK_RX_BT_32DWORDS;
mtk_w32(eth, val, reg_map->qdma.glo_cfg);
-@@ -3008,6 +3124,45 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3007,6 +3123,45 @@ static void mtk_gdm_config(struct mtk_et
mtk_w32(eth, 0, MTK_RST_GL);
}
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
-@@ -3050,7 +3205,8 @@ static int mtk_open(struct net_device *d
+@@ -3049,7 +3204,8 @@ static int mtk_open(struct net_device *d
refcount_inc(ð->dma_refcnt);
phylink_start(mac->phylink);
return 0;
}
-@@ -3759,8 +3915,12 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -3758,8 +3914,12 @@ static int mtk_unreg_dev(struct mtk_eth
int i;
for (i = 0; i < MTK_MAC_COUNT; i++) {
unregister_netdev(eth->netdev[i]);
}
-@@ -3977,6 +4137,23 @@ static int mtk_set_rxnfc(struct net_devi
+@@ -3976,6 +4136,23 @@ static int mtk_set_rxnfc(struct net_devi
return ret;
}
static const struct ethtool_ops mtk_ethtool_ops = {
.get_link_ksettings = mtk_get_link_ksettings,
.set_link_ksettings = mtk_set_link_ksettings,
-@@ -4011,6 +4188,7 @@ static const struct net_device_ops mtk_n
+@@ -4010,6 +4187,7 @@ static const struct net_device_ops mtk_n
.ndo_setup_tc = mtk_eth_setup_tc,
.ndo_bpf = mtk_xdp,
.ndo_xdp_xmit = mtk_xdp_xmit,
};
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
-@@ -4020,6 +4198,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4019,6 +4197,7 @@ static int mtk_add_mac(struct mtk_eth *e
struct phylink *phylink;
struct mtk_mac *mac;
int id, err;
if (!_id) {
dev_err(eth->dev, "missing mac id\n");
-@@ -4037,7 +4216,10 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4036,7 +4215,10 @@ static int mtk_add_mac(struct mtk_eth *e
return -EINVAL;
}
if (!eth->netdev[id]) {
dev_err(eth->dev, "alloc_etherdev failed\n");
return -ENOMEM;
-@@ -4145,6 +4327,11 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4144,6 +4326,11 @@ static int mtk_add_mac(struct mtk_eth *e
else
eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
#include "mtk_eth_soc.h"
#include "mtk_wed.h"
-@@ -2021,16 +2022,22 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2020,16 +2021,22 @@ static int mtk_poll_rx(struct napi_struc
htons(RX_DMA_VPID(trxd.rxd4)),
RX_DMA_VID(trxd.rxd4));
} else if (trxd.rxd2 & RX_DMA_VTAG) {
}
skb_record_rx_queue(skb, 0);
-@@ -2858,15 +2865,30 @@ static netdev_features_t mtk_fix_feature
+@@ -2857,15 +2864,30 @@ static netdev_features_t mtk_fix_feature
static int mtk_set_features(struct net_device *dev, netdev_features_t features)
{
}
/* wait for DMA to finish whatever it is doing before we start using it again */
-@@ -3163,11 +3185,45 @@ found:
+@@ -3162,11 +3184,45 @@ found:
return NOTIFY_DONE;
}
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
-@@ -3688,6 +3744,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3687,6 +3743,10 @@ static int mtk_hw_init(struct mtk_eth *e
*/
val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL);
/* Enable RX VLan Offloading */
mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
-@@ -3907,6 +3967,12 @@ static int mtk_free_dev(struct mtk_eth *
+@@ -3906,6 +3966,12 @@ static int mtk_free_dev(struct mtk_eth *
free_netdev(eth->netdev[i]);
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3201,7 +3201,8 @@ static int mtk_open(struct net_device *d
+@@ -3200,7 +3200,8 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
struct metadata_dst *md_dst = eth->dsa_meta[i];
-@@ -3218,7 +3219,8 @@ static int mtk_open(struct net_device *d
+@@ -3217,7 +3218,8 @@ static int mtk_open(struct net_device *d
}
} else {
/* Hardware special tag parsing needs to be disabled if at least
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3136,7 +3136,7 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3135,7 +3135,7 @@ static void mtk_gdm_config(struct mtk_et
val |= config;
val |= MTK_GDMA_SPECIAL_TAG;
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-@@ -3201,8 +3201,7 @@ static int mtk_open(struct net_device *d
+@@ -3200,8 +3200,7 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
struct metadata_dst *md_dst = eth->dsa_meta[i];
-@@ -3219,8 +3218,7 @@ static int mtk_open(struct net_device *d
+@@ -3218,8 +3217,7 @@ static int mtk_open(struct net_device *d
}
} else {
/* Hardware special tag parsing needs to be disabled if at least
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1877,7 +1877,9 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1876,7 +1876,9 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
dma_addr_t dma_addr;
u32 hash, reason;
int mac = 0;
-@@ -2017,27 +2019,29 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2016,27 +2018,29 @@ static int mtk_poll_rx(struct napi_struc
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -719,8 +719,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -718,8 +718,6 @@ static void mtk_mac_link_up(struct phyli
break;
}
mtk_eth_path_name(path), __func__, updated);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4803,6 +4803,26 @@ static const struct mtk_soc_data mt7629_
+@@ -4802,6 +4802,26 @@ static const struct mtk_soc_data mt7629_
},
};
static const struct mtk_soc_data mt7986_data = {
.reg_map = &mt7986_reg_map,
.ana_rgc3 = 0x128,
-@@ -4845,6 +4865,7 @@ const struct of_device_id of_mtk_match[]
+@@ -4844,6 +4864,7 @@ const struct of_device_id of_mtk_match[]
{ .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{ .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -744,8 +744,10 @@ static const struct phylink_mac_ops mtk_
+@@ -743,8 +743,10 @@ static const struct phylink_mac_ops mtk_
static int mtk_mdio_init(struct mtk_eth *eth)
{
mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus");
if (!mii_np) {
-@@ -772,6 +774,25 @@ static int mtk_mdio_init(struct mtk_eth
+@@ -771,6 +773,25 @@ static int mtk_mdio_init(struct mtk_eth
eth->mii_bus->parent = eth->dev;
snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
}
return NULL;
-@@ -4016,8 +4017,17 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -4015,8 +4016,17 @@ static int mtk_unreg_dev(struct mtk_eth
return 0;
}
mtk_unreg_dev(eth);
mtk_free_dev(eth);
cancel_work_sync(ð->pending_work);
-@@ -4457,6 +4467,36 @@ void mtk_eth_set_dma_device(struct mtk_e
+@@ -4456,6 +4466,36 @@ void mtk_eth_set_dma_device(struct mtk_e
rtnl_unlock();
}
static int mtk_probe(struct platform_device *pdev)
{
struct resource *res = NULL;
-@@ -4520,13 +4560,7 @@ static int mtk_probe(struct platform_dev
+@@ -4519,13 +4559,7 @@ static int mtk_probe(struct platform_dev
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
if (err)
return err;
-@@ -4537,14 +4571,17 @@ static int mtk_probe(struct platform_dev
+@@ -4536,14 +4570,17 @@ static int mtk_probe(struct platform_dev
"mediatek,pctl");
if (IS_ERR(eth->pctl)) {
dev_err(&pdev->dev, "no pctl regmap found\n");
}
if (eth->soc->offload_version) {
-@@ -4703,6 +4740,8 @@ err_deinit_hw:
+@@ -4702,6 +4739,8 @@ err_deinit_hw:
mtk_hw_deinit(eth);
err_wed_exit:
mtk_wed_exit();
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4691,8 +4691,8 @@ static int mtk_probe(struct platform_dev
+@@ -4690,8 +4690,8 @@ static int mtk_probe(struct platform_dev
for (i = 0; i < num_ppe; i++) {
u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
if (!eth->ppe[i]) {
err = -ENOMEM;
goto err_deinit_ppe;
-@@ -4816,6 +4816,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4815,6 +4815,7 @@ static const struct mtk_soc_data mt7622_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
-@@ -4853,6 +4854,7 @@ static const struct mtk_soc_data mt7629_
+@@ -4852,6 +4853,7 @@ static const struct mtk_soc_data mt7629_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7629_CLKS_BITMAP,
.required_pctl = false,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4873,6 +4875,7 @@ static const struct mtk_soc_data mt7981_
+@@ -4872,6 +4874,7 @@ static const struct mtk_soc_data mt7981_
.offload_version = 2,
.hash_offset = 4,
.foe_entry_size = sizeof(struct mtk_foe_entry),
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
-@@ -4893,6 +4896,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4892,6 +4895,7 @@ static const struct mtk_soc_data mt7986_
.offload_version = 2,
.hash_offset = 4,
.foe_entry_size = sizeof(struct mtk_foe_entry),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1897,9 +1897,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1896,9 +1896,7 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
dma_addr_t dma_addr;
u32 hash, reason;
int mac = 0;
-@@ -2034,36 +2032,21 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2033,36 +2031,21 @@ static int mtk_poll_rx(struct napi_struc
skb_checksum_none_assert(skb);
skb->protocol = eth_type_trans(skb, netdev);
skb_record_rx_queue(skb, 0);
napi_gro_receive(napi, skb);
-@@ -2889,29 +2872,11 @@ static netdev_features_t mtk_fix_feature
+@@ -2888,29 +2871,11 @@ static netdev_features_t mtk_fix_feature
static int mtk_set_features(struct net_device *dev, netdev_features_t features)
{
return 0;
}
-@@ -3225,30 +3190,6 @@ static int mtk_open(struct net_device *d
+@@ -3224,30 +3189,6 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
netdev_err(dev, "%s: could not attach PHY: %d\n", __func__,
-@@ -3287,6 +3228,35 @@ static int mtk_open(struct net_device *d
+@@ -3286,6 +3227,35 @@ static int mtk_open(struct net_device *d
phylink_start(mac->phylink);
netif_tx_start_all_queues(dev);
return 0;
}
-@@ -3771,10 +3741,9 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3770,10 +3740,9 @@ static int mtk_hw_init(struct mtk_eth *e
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL);
/* set interrupt delays based on current Net DIM sample */
mtk_dim_rx(ð->rx_dim.work);
-@@ -4414,7 +4383,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4413,7 +4382,7 @@ static int mtk_add_mac(struct mtk_eth *e
eth->netdev[id]->hw_features |= NETIF_F_LRO;
eth->netdev[id]->vlan_features = eth->soc->hw_features &
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4765,7 +4765,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4764,7 +4764,7 @@ static const struct mtk_soc_data mt7621_
.required_pctl = false,
.offload_version = 1,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4786,7 +4786,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4785,7 +4785,7 @@ static const struct mtk_soc_data mt7622_
.offload_version = 2,
.hash_offset = 2,
.has_accounting = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4805,7 +4805,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4804,7 +4804,7 @@ static const struct mtk_soc_data mt7623_
.required_pctl = true,
.offload_version = 1,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4843,8 +4843,8 @@ static const struct mtk_soc_data mt7981_
+@@ -4842,8 +4842,8 @@ static const struct mtk_soc_data mt7981_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
-@@ -4864,8 +4864,8 @@ static const struct mtk_soc_data mt7986_
+@@ -4863,8 +4863,8 @@ static const struct mtk_soc_data mt7986_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
/* mt7623_pad_clk_setup */
for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
-@@ -4342,13 +4314,19 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4341,13 +4313,19 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id)
__set_bit(PHY_INTERFACE_MODE_TRGMII,
-@@ -4806,6 +4784,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4805,6 +4783,7 @@ static const struct mtk_soc_data mt7623_
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -555,38 +555,6 @@ static int mtk_mac_finish(struct phylink
+@@ -554,38 +554,6 @@ static int mtk_mac_finish(struct phylink
return 0;
}
static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,
phy_interface_t interface)
{
-@@ -708,7 +676,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -707,7 +675,6 @@ static void mtk_mac_link_up(struct phyli
static const struct phylink_mac_ops mtk_phylink_ops = {
.mac_select_pcs = mtk_mac_select_pcs,
.mac_config = mtk_mac_config,
.mac_finish = mtk_mac_finish,
.mac_link_down = mtk_mac_link_down,
-@@ -4309,8 +4276,6 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4308,8 +4275,6 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -580,7 +580,7 @@ static void mtk_set_queue_speed(struct m
+@@ -579,7 +579,7 @@ static void mtk_set_queue_speed(struct m
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |
MTK_QTX_SCH_LEAKY_BUCKET_SIZE;
val |= MTK_QTX_SCH_LEAKY_BUCKET_EN;
if (IS_ENABLED(CONFIG_SOC_MT7621)) {
-@@ -955,7 +955,7 @@ static bool mtk_rx_get_desc(struct mtk_e
+@@ -954,7 +954,7 @@ static bool mtk_rx_get_desc(struct mtk_e
rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
}
-@@ -1013,7 +1013,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -1012,7 +1012,7 @@ static int mtk_init_fq_dma(struct mtk_et
txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
txd->txd4 = 0;
txd->txd5 = 0;
txd->txd6 = 0;
txd->txd7 = 0;
-@@ -1204,7 +1204,7 @@ static void mtk_tx_set_dma_desc(struct n
+@@ -1203,7 +1203,7 @@ static void mtk_tx_set_dma_desc(struct n
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
mtk_tx_set_dma_desc_v2(dev, txd, info);
else
mtk_tx_set_dma_desc_v1(dev, txd, info);
-@@ -1511,7 +1511,7 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1510,7 +1510,7 @@ static void mtk_update_rx_cpu_idx(struct
static bool mtk_page_pool_enabled(struct mtk_eth *eth)
{
}
static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth,
-@@ -1853,7 +1853,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1852,7 +1852,7 @@ static int mtk_poll_rx(struct napi_struc
break;
/* find out which mac the packet come from. values start at 1 */
mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1;
else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
!(trxd.rxd4 & RX_DMA_SPECIAL_TAG))
-@@ -1949,7 +1949,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1948,7 +1948,7 @@ static int mtk_poll_rx(struct napi_struc
skb->dev = netdev;
bytes += skb->len;
reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5);
hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY;
if (hash != MTK_RXD5_FOE_ENTRY)
-@@ -1974,8 +1974,8 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1973,8 +1973,8 @@ static int mtk_poll_rx(struct napi_struc
/* When using VLAN untagging in combination with DSA, the
* hardware treats the MTK special tag as a VLAN and untags it.
*/
unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0);
if (port < ARRAY_SIZE(eth->dsa_meta) &&
-@@ -2285,7 +2285,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2284,7 +2284,7 @@ static int mtk_tx_alloc(struct mtk_eth *
txd->txd2 = next_ptr;
txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
txd->txd4 = 0;
txd->txd5 = 0;
txd->txd6 = 0;
txd->txd7 = 0;
-@@ -2338,14 +2338,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2337,14 +2337,14 @@ static int mtk_tx_alloc(struct mtk_eth *
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |
MTK_QTX_SCH_LEAKY_BUCKET_SIZE;
mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4);
} else {
mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
-@@ -2474,7 +2474,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2473,7 +2473,7 @@ static int mtk_rx_alloc(struct mtk_eth *
rxd->rxd3 = 0;
rxd->rxd4 = 0;
rxd->rxd5 = 0;
rxd->rxd6 = 0;
rxd->rxd7 = 0;
-@@ -3025,7 +3025,7 @@ static int mtk_start_dma(struct mtk_eth
+@@ -3024,7 +3024,7 @@ static int mtk_start_dma(struct mtk_eth
MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE;
val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN;
-@@ -3167,7 +3167,7 @@ static int mtk_open(struct net_device *d
+@@ -3166,7 +3166,7 @@ static int mtk_open(struct net_device *d
phylink_start(mac->phylink);
netif_tx_start_all_queues(dev);
return 0;
if (mtk_uses_dsa(dev) && !eth->prog) {
-@@ -3432,7 +3432,7 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3431,7 +3431,7 @@ static void mtk_hw_reset(struct mtk_eth
{
u32 val;
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
val = RSTCTRL_PPE0_V2;
} else {
-@@ -3444,7 +3444,7 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3443,7 +3443,7 @@ static void mtk_hw_reset(struct mtk_eth
ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val);
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
0x3ffffff);
}
-@@ -3470,7 +3470,7 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3469,7 +3469,7 @@ static void mtk_hw_warm_reset(struct mtk
return;
}
rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2;
else
rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0;
-@@ -3640,7 +3640,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3639,7 +3639,7 @@ static int mtk_hw_init(struct mtk_eth *e
else
mtk_hw_reset(eth);
/* Set FE to PDMAv2 if necessary */
val = mtk_r32(eth, MTK_FE_GLO_MISC);
mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC);
-@@ -3677,7 +3677,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3676,7 +3676,7 @@ static int mtk_hw_init(struct mtk_eth *e
*/
val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL);
val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL);
-@@ -3699,7 +3699,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3698,7 +3698,7 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
/* PSE should not drop port8 and port9 packets from WDMA Tx */
mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
-@@ -4488,7 +4488,7 @@ static int mtk_probe(struct platform_dev
+@@ -4487,7 +4487,7 @@ static int mtk_probe(struct platform_dev
}
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
err = -EINVAL;
-@@ -4596,9 +4596,8 @@ static int mtk_probe(struct platform_dev
+@@ -4595,9 +4595,8 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe);
for (i = 0; i < num_ppe; i++) {
u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
-@@ -4690,6 +4689,7 @@ static const struct mtk_soc_data mt2701_
+@@ -4689,6 +4688,7 @@ static const struct mtk_soc_data mt2701_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4706,6 +4706,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4705,6 +4705,7 @@ static const struct mtk_soc_data mt7621_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
-@@ -4726,6 +4727,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4725,6 +4726,7 @@ static const struct mtk_soc_data mt7622_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.has_accounting = true,
-@@ -4746,6 +4748,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4745,6 +4747,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
-@@ -4768,6 +4771,7 @@ static const struct mtk_soc_data mt7629_
+@@ -4767,6 +4770,7 @@ static const struct mtk_soc_data mt7629_
.required_clks = MT7629_CLKS_BITMAP,
.required_pctl = false,
.has_accounting = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4785,6 +4789,7 @@ static const struct mtk_soc_data mt7981_
+@@ -4784,6 +4788,7 @@ static const struct mtk_soc_data mt7981_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7981_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.has_accounting = true,
-@@ -4806,6 +4811,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4805,6 +4810,7 @@ static const struct mtk_soc_data mt7986_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7986_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.has_accounting = true,
-@@ -4826,6 +4832,7 @@ static const struct mtk_soc_data rt5350_
+@@ -4825,6 +4831,7 @@ static const struct mtk_soc_data rt5350_
.hw_features = MTK_HW_FEATURES_MT7628,
.required_clks = MT7628_CLKS_BITMAP,
.required_pctl = false,
else
val = MTK_FOE_IB2_MIB_CNT;
@@ -965,7 +965,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
+ MTK_PPE_SCAN_MODE_CHECK_AGE) |
FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
MTK_PPE_ENTRIES_SHIFT);
- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2))
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -881,7 +881,7 @@ static void mtk_stats_update(struct mtk_
+@@ -880,7 +880,7 @@ static void mtk_stats_update(struct mtk_
{
int i;
if (!eth->mac[i] || !eth->mac[i]->hw_stats)
continue;
if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) {
-@@ -1386,7 +1386,7 @@ static int mtk_queue_stopped(struct mtk_
+@@ -1385,7 +1385,7 @@ static int mtk_queue_stopped(struct mtk_
{
int i;
if (!eth->netdev[i])
continue;
if (netif_queue_stopped(eth->netdev[i]))
-@@ -1400,7 +1400,7 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1399,7 +1399,7 @@ static void mtk_wake_queue(struct mtk_et
{
int i;
if (!eth->netdev[i])
continue;
netif_tx_wake_all_queues(eth->netdev[i]);
-@@ -1859,7 +1859,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1858,7 +1858,7 @@ static int mtk_poll_rx(struct napi_struc
!(trxd.rxd4 & RX_DMA_SPECIAL_TAG))
mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1;
!eth->netdev[mac]))
goto release_desc;
-@@ -2899,7 +2899,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2898,7 +2898,7 @@ static void mtk_dma_free(struct mtk_eth
const struct mtk_soc_data *soc = eth->soc;
int i;
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
-@@ -3053,8 +3053,13 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3052,8 +3052,13 @@ static void mtk_gdm_config(struct mtk_et
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
return;
/* default setup the forward port to send frame to PDMA */
val &= ~0xffff;
-@@ -3064,7 +3069,7 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3063,7 +3068,7 @@ static void mtk_gdm_config(struct mtk_et
val |= config;
val |= MTK_GDMA_SPECIAL_TAG;
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-@@ -3661,15 +3666,15 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3660,15 +3665,15 @@ static int mtk_hw_init(struct mtk_eth *e
* up with the more appropriate value when mtk_mac_config call is being
* invoked.
*/
}
/* Indicates CDM to parse the MTK special tag from CPU
-@@ -3849,7 +3854,7 @@ static void mtk_pending_work(struct work
+@@ -3848,7 +3853,7 @@ static void mtk_pending_work(struct work
mtk_prepare_for_reset(eth);
/* stop all devices to make sure that dma is properly shut down */
if (!eth->netdev[i] || !netif_running(eth->netdev[i]))
continue;
-@@ -3865,8 +3870,8 @@ static void mtk_pending_work(struct work
+@@ -3864,8 +3869,8 @@ static void mtk_pending_work(struct work
mtk_hw_init(eth, true);
/* restart DMA and enable IRQs */
continue;
if (mtk_open(eth->netdev[i])) {
-@@ -3893,7 +3898,7 @@ static int mtk_free_dev(struct mtk_eth *
+@@ -3892,7 +3897,7 @@ static int mtk_free_dev(struct mtk_eth *
{
int i;
if (!eth->netdev[i])
continue;
free_netdev(eth->netdev[i]);
-@@ -3912,7 +3917,7 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -3911,7 +3916,7 @@ static int mtk_unreg_dev(struct mtk_eth
{
int i;
struct mtk_mac *mac;
if (!eth->netdev[i])
continue;
-@@ -4213,7 +4218,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4212,7 +4217,7 @@ static int mtk_add_mac(struct mtk_eth *e
}
id = be32_to_cpup(_id);
dev_err(eth->dev, "%d is not a valid mac id\n", id);
return -EINVAL;
}
-@@ -4358,7 +4363,7 @@ void mtk_eth_set_dma_device(struct mtk_e
+@@ -4357,7 +4362,7 @@ void mtk_eth_set_dma_device(struct mtk_e
rtnl_lock();
dev = eth->netdev[i];
if (!dev || !(dev->flags & IFF_UP))
-@@ -4664,7 +4669,7 @@ static int mtk_remove(struct platform_de
+@@ -4663,7 +4668,7 @@ static int mtk_remove(struct platform_de
int i;
/* stop all devices to make sure that dma is properly shut down */
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -861,17 +861,32 @@ void mtk_stats_update_mac(struct mtk_mac
+@@ -860,17 +860,32 @@ void mtk_stats_update_mac(struct mtk_mac
mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs);
hw_stats->rx_flow_control_packets +=
mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs);
}
u64_stats_update_end(&hw_stats->syncp);
-@@ -1175,7 +1190,10 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1174,7 +1189,10 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -1186,6 +1204,8 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1185,6 +1203,8 @@ static void mtk_tx_set_dma_desc_v2(struc
/* tx checksum offload */
if (info->csum)
data |= TX_DMA_CHKSUM_V2;
}
WRITE_ONCE(desc->txd5, data);
-@@ -1251,8 +1271,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1250,8 +1270,7 @@ static int mtk_tx_map(struct sk_buff *sk
mtk_tx_set_dma_desc(dev, itxd, &txd_info);
itx_buf->flags |= MTK_TX_FLAGS_SINGLE0;
setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size,
k++);
-@@ -1300,8 +1319,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1299,8 +1318,7 @@ static int mtk_tx_map(struct sk_buff *sk
memset(tx_buf, 0, sizeof(*tx_buf));
tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
tx_buf->flags |= MTK_TX_FLAGS_PAGE0;
setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr,
txd_info.size, k++);
-@@ -1603,7 +1621,7 @@ static int mtk_xdp_frame_map(struct mtk_
+@@ -1602,7 +1620,7 @@ static int mtk_xdp_frame_map(struct mtk_
}
mtk_tx_set_dma_desc(dev, txd, txd_info);
tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX;
tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
-@@ -1853,11 +1871,24 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1852,11 +1870,24 @@ static int mtk_poll_rx(struct napi_struc
break;
/* find out which mac the packet come from. values start at 1 */
if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS ||
!eth->netdev[mac]))
-@@ -2079,7 +2110,6 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2078,7 +2109,6 @@ static int mtk_poll_tx_qdma(struct mtk_e
while ((cpu != dma) && budget) {
u32 next_cpu = desc->txd2;
desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
-@@ -2087,15 +2117,13 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2086,15 +2116,13 @@ static int mtk_poll_tx_qdma(struct mtk_e
tx_buf = mtk_desc_to_tx_buf(ring, desc,
eth->soc->txrx.txd_size);
budget--;
}
-@@ -3704,7 +3732,24 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3703,7 +3731,24 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
/* PSE should not drop port8 and port9 packets from WDMA Tx */
mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
-@@ -4266,7 +4311,11 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4265,7 +4310,11 @@ static int mtk_add_mac(struct mtk_eth *e
}
spin_lock_init(&mac->hw_stats->stats_lock);
u64_stats_init(&mac->hw_stats->syncp);
return;
err_phy:
-@@ -725,11 +841,15 @@ static int mtk_mdio_init(struct mtk_eth
+@@ -724,11 +840,15 @@ static int mtk_mdio_init(struct mtk_eth
}
divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);
dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);
-@@ -1190,10 +1310,19 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1189,10 +1309,19 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -4360,6 +4489,17 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4359,6 +4488,17 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.supported_interfaces);
}
phylink = phylink_create(&mac->phylink_config,
of_fwnode_handle(mac->of_node),
phy_mode, &mtk_phylink_ops);
-@@ -4880,6 +5020,24 @@ static const struct mtk_soc_data mt7986_
+@@ -4879,6 +5019,24 @@ static const struct mtk_soc_data mt7986_
},
};
static const struct mtk_soc_data rt5350_data = {
.reg_map = &mt7628_reg_map,
.caps = MT7628_CAPS,
-@@ -4898,14 +5056,15 @@ static const struct mtk_soc_data rt5350_
+@@ -4897,14 +5055,15 @@ static const struct mtk_soc_data rt5350_
};
const struct of_device_id of_mtk_match[] = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1658,7 +1658,7 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1657,7 +1657,7 @@ static void mtk_update_rx_cpu_idx(struct
static bool mtk_page_pool_enabled(struct mtk_eth *eth)
{
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -5028,6 +5028,9 @@ static const struct mtk_soc_data mt7988_
+@@ -5027,6 +5027,9 @@ static const struct mtk_soc_data mt7988_
.required_clks = MT7988_CLKS_BITMAP,
.required_pctl = false,
.version = 3,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -5030,6 +5030,7 @@ static const struct mtk_soc_data mt7988_
+@@ -5029,6 +5029,7 @@ static const struct mtk_soc_data mt7988_
.version = 3,
.offload_version = 2,
.hash_offset = 4,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3594,19 +3594,34 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3593,19 +3593,34 @@ static void mtk_hw_reset(struct mtk_eth
{
u32 val;
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
0x3ffffff);
}
-@@ -3632,13 +3647,21 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3631,13 +3646,21 @@ static void mtk_hw_warm_reset(struct mtk
return;
}
regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask);
-@@ -3990,11 +4013,17 @@ static void mtk_prepare_for_reset(struct
+@@ -3989,11 +4012,17 @@ static void mtk_prepare_for_reset(struct
u32 val;
int i;
/* adjust PPE configurations to prepare for reset */
for (i = 0; i < ARRAY_SIZE(eth->ppe); i++)
-@@ -4055,11 +4084,18 @@ static void mtk_pending_work(struct work
+@@ -4054,11 +4083,18 @@ static void mtk_pending_work(struct work
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1118,10 +1118,13 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -1117,10 +1117,13 @@ static int mtk_init_fq_dma(struct mtk_et
dma_addr_t dma_addr;
int i;
if (unlikely(!eth->scratch_ring))
return -ENOMEM;
-@@ -2429,8 +2432,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2428,8 +2431,14 @@ static int mtk_tx_alloc(struct mtk_eth *
if (!ring->buf)
goto no_tx_mem;
if (!ring->dma)
goto no_tx_mem;
-@@ -2529,8 +2538,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2528,8 +2537,7 @@ static void mtk_tx_clean(struct mtk_eth
kfree(ring->buf);
ring->buf = NULL;
}
dma_free_coherent(eth->dma_dev,
ring->dma_size * soc->txrx.txd_size,
ring->dma, ring->phys);
-@@ -2549,9 +2557,14 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2548,9 +2556,14 @@ static int mtk_rx_alloc(struct mtk_eth *
{
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
struct mtk_rx_ring *ring;
if (rx_flag == MTK_RX_FLAGS_QDMA) {
if (ring_no)
return -EINVAL;
-@@ -2586,9 +2599,20 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2585,9 +2598,20 @@ static int mtk_rx_alloc(struct mtk_eth *
ring->page_pool = pp;
}
if (!ring->dma)
return -ENOMEM;
-@@ -2673,7 +2697,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2672,7 +2696,7 @@ static int mtk_rx_alloc(struct mtk_eth *
return 0;
}
{
int i;
-@@ -2696,7 +2720,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2695,7 +2719,7 @@ static void mtk_rx_clean(struct mtk_eth
ring->data = NULL;
}
dma_free_coherent(eth->dma_dev,
ring->dma_size * eth->soc->txrx.rxd_size,
ring->dma, ring->phys);
-@@ -3059,7 +3083,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -3058,7 +3082,7 @@ static void mtk_dma_free(struct mtk_eth
for (i = 0; i < MTK_MAX_DEVS; i++)
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
dma_free_coherent(eth->dma_dev,
MTK_QDMA_RING_SIZE * soc->txrx.txd_size,
eth->scratch_ring, eth->phy_scratch_ring);
-@@ -3067,13 +3091,13 @@ static void mtk_dma_free(struct mtk_eth
+@@ -3066,13 +3090,13 @@ static void mtk_dma_free(struct mtk_eth
eth->phy_scratch_ring = 0;
}
mtk_tx_clean(eth);
}
kfree(eth->scratch_head);
-@@ -4641,7 +4665,7 @@ static int mtk_sgmii_init(struct mtk_eth
+@@ -4640,7 +4664,7 @@ static int mtk_sgmii_init(struct mtk_eth
static int mtk_probe(struct platform_device *pdev)
{
struct device_node *mac_np;
struct mtk_eth *eth;
int err, i;
-@@ -4661,6 +4685,20 @@ static int mtk_probe(struct platform_dev
+@@ -4660,6 +4684,20 @@ static int mtk_probe(struct platform_dev
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
eth->ip_align = NET_IP_ALIGN;
spin_lock_init(ð->page_lock);
spin_lock_init(ð->tx_irq_lock);
spin_lock_init(ð->rx_irq_lock);
-@@ -4724,6 +4762,18 @@ static int mtk_probe(struct platform_dev
+@@ -4723,6 +4761,18 @@ static int mtk_probe(struct platform_dev
err = -EINVAL;
goto err_destroy_sgmii;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1311,6 +1311,10 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1310,6 +1310,10 @@ static void mtk_tx_set_dma_desc_v2(struc
data = TX_DMA_PLEN0(info->size);
if (info->last)
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
/* set forward port */
-@@ -1980,6 +1984,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1979,6 +1983,7 @@ static int mtk_poll_rx(struct napi_struc
bool xdp_flush = false;
int idx;
struct sk_buff *skb;
u8 *data, *new_data;
struct mtk_rx_dma_v2 *rxd, trxd;
int done = 0, bytes = 0;
-@@ -2095,7 +2100,10 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2094,7 +2099,10 @@ static int mtk_poll_rx(struct napi_struc
goto release_desc;
}
ring->buf_size, DMA_FROM_DEVICE);
skb = build_skb(data, ring->frag_size);
-@@ -2161,6 +2169,9 @@ release_desc:
+@@ -2160,6 +2168,9 @@ release_desc:
else
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
ring->calc_idx = idx;
done++;
}
-@@ -2653,6 +2664,9 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2652,6 +2663,9 @@ static int mtk_rx_alloc(struct mtk_eth *
else
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
rxd->rxd3 = 0;
rxd->rxd4 = 0;
if (mtk_is_netsys_v2_or_greater(eth)) {
-@@ -2699,6 +2713,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2698,6 +2712,7 @@ static int mtk_rx_alloc(struct mtk_eth *
static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram)
{
int i;
if (ring->data && ring->dma) {
-@@ -2712,7 +2727,10 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2711,7 +2726,10 @@ static void mtk_rx_clean(struct mtk_eth
if (!rxd->rxd1)
continue;
ring->buf_size, DMA_FROM_DEVICE);
mtk_rx_put_buff(ring, ring->data[i], false);
}
-@@ -4699,6 +4717,14 @@ static int mtk_probe(struct platform_dev
+@@ -4698,6 +4716,14 @@ static int mtk_probe(struct platform_dev
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1988,11 +1988,11 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1987,11 +1987,11 @@ static int mtk_poll_rx(struct napi_struc
u8 *data, *new_data;
struct mtk_rx_dma_v2 *rxd, trxd;
int done = 0, bytes = 0;
u32 hash, reason;
int mac = 0;
-@@ -2169,7 +2169,8 @@ release_desc:
+@@ -2168,7 +2168,8 @@ release_desc:
else
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
+++ /dev/null
-From be4512b9ac6fc53e1ca8daccbda84f643215c547 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
-Date: Thu, 14 Mar 2024 12:28:35 +0300
-Subject: [PATCH 1/3] net: dsa: mt7530: prevent possible incorrect XTAL
- frequency selection
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-[ Upstream commit f490c492e946d8ffbe65ad4efc66de3c5ede30a4 ]
-
-On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit
-value that represents the frequency of the crystal oscillator connected to
-the switch IC. The field is populated by the state of the ESW_P4_LED_0 and
-ESW_P4_LED_0 pins, which is done right after reset is deasserted.
-
- ESW_P4_LED_0 ESW_P3_LED_0 Frequency
- -----------------------------------------
- 0 0 Reserved
- 0 1 20MHz
- 1 0 40MHz
- 1 1 25MHz
-
-On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0
-pin is used to populate the bit. 25MHz when the pin is high, 40MHz when
-it's low.
-
-These pins are also used with LEDs, therefore, their state can be set to
-something other than the bootstrapping configuration. For example, a link
-may be established on port 3 before the DSA subdriver takes control of the
-switch which would set ESW_P3_LED_0 to high.
-
-Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is
-described between reset assertion and deassertion. Some switch ICs in real
-life conditions cannot always have these pins set back to the bootstrapping
-configuration before reset deassertion in this amount of delay. This causes
-wrong crystal frequency to be selected which puts the switch in a
-nonfunctional state after reset deassertion.
-
-The tests below are conducted on an MT7530 with a 40MHz crystal oscillator
-by Justin Swartz.
-
-With a cable from an active peer connected to port 3 before reset, an
-incorrect crystal frequency (0b11 = 25MHz) is selected:
-
- [1] [3] [5]
- : : :
- _____________________________ __________________
-ESW_P4_LED_0 |_______|
- _____________________________
-ESW_P3_LED_0 |__________________________
-
- : : : :
- : : [4]...:
- : :
- [2]................:
-
-[1] Reset is asserted.
-[2] Period of 1000 - 1100 usec.
-[3] Reset is deasserted.
-[4] Period of 315 usec. HWTRAP register is populated with incorrect
- XTAL frequency.
-[5] Signals reflect the bootstrapped configuration.
-
-Increase the delay between reset_control_assert() and
-reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and
-gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount
-ensures a higher possibility that the switch IC will have these pins back
-to the bootstrapping configuration before reset deassertion.
-
-With a cable from an active peer connected to port 3 before reset, the
-correct crystal frequency (0b10 = 40MHz) is selected:
-
- [1] [2-1] [3] [5]
- : : : :
- _____________________________ __________________
-ESW_P4_LED_0 |_______|
- ___________________ _______
-ESW_P3_LED_0 |_________| |__________________
-
- : : : : :
- : [2-2]...: [4]...:
- [2]................:
-
-[1] Reset is asserted.
-[2] Period of 5000 - 5100 usec.
-[2-1] ESW_P3_LED_0 goes low.
-[2-2] Remaining period of 5000 - 5100 usec.
-[3] Reset is deasserted.
-[4] Period of 310 usec. HWTRAP register is populated with bootstrapped
- XTAL frequency.
-[5] Signals reflect the bootstrapped configuration.
-
-ESW_P3_LED_0 low period before reset deassertion:
-
- 5000 usec
- - 5100 usec
- TEST RESET HOLD
- # (usec)
- ---------------------
- 1 5410
- 2 5440
- 3 4375
- 4 5490
- 5 5475
- 6 4335
- 7 4370
- 8 5435
- 9 4205
- 10 4335
- 11 3750
- 12 3170
- 13 4395
- 14 4375
- 15 3515
- 16 4335
- 17 4220
- 18 4175
- 19 4175
- 20 4350
-
- Min 3170
- Max 5490
-
- Median 4342.500
- Avg 4466.500
-
-Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset").
-Changing the state of pins via reset assertion is simpler and more
-efficient than doing so by setting the LED controller off.
-
-Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
-Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
-Co-developed-by: Justin Swartz <justin.swartz@risingedge.co.za>
-Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
-Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/net/dsa/mt7530.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -2187,11 +2187,11 @@ mt7530_setup(struct dsa_switch *ds)
- */
- if (priv->mcm) {
- reset_control_assert(priv->rstc);
-- usleep_range(1000, 1100);
-+ usleep_range(5000, 5100);
- reset_control_deassert(priv->rstc);
- } else {
- gpiod_set_value_cansleep(priv->reset, 0);
-- usleep_range(1000, 1100);
-+ usleep_range(5000, 5100);
- gpiod_set_value_cansleep(priv->reset, 1);
- }
-
-@@ -2401,11 +2401,11 @@ mt7531_setup(struct dsa_switch *ds)
- */
- if (priv->mcm) {
- reset_control_assert(priv->rstc);
-- usleep_range(1000, 1100);
-+ usleep_range(5000, 5100);
- reset_control_deassert(priv->rstc);
- } else {
- gpiod_set_value_cansleep(priv->reset, 0);
-- usleep_range(1000, 1100);
-+ usleep_range(5000, 5100);
- gpiod_set_value_cansleep(priv->reset, 1);
- }
-
+++ /dev/null
-From f1fa919ea59655f73cb3972264e157b8831ba546 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
-Date: Thu, 14 Mar 2024 12:33:41 +0300
-Subject: [PATCH 2/3] net: dsa: mt7530: fix link-local frames that ingress vlan
- filtering ports
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-[ Upstream commit e8bf353577f382c7066c661fed41b2adc0fc7c40 ]
-
-Whether VLAN-aware or not, on every VID VLAN table entry that has the CPU
-port as a member of it, frames are set to egress the CPU port with the VLAN
-tag stacked. This is so that VLAN tags can be appended after hardware
-special tag (called DSA tag in the context of Linux drivers).
-
-For user ports on a VLAN-unaware bridge, frame ingressing the user port
-egresses CPU port with only the special tag.
-
-For user ports on a VLAN-aware bridge, frame ingressing the user port
-egresses CPU port with the special tag and the VLAN tag.
-
-This causes issues with link-local frames, specifically BPDUs, because the
-software expects to receive them VLAN-untagged.
-
-There are two options to make link-local frames egress untagged. Setting
-CONSISTENT or UNTAGGED on the EG_TAG bits on the relevant register.
-CONSISTENT means frames egress exactly as they ingress. That means
-egressing with the VLAN tag they had at ingress or egressing untagged if
-they ingressed untagged. Although link-local frames are not supposed to be
-transmitted VLAN-tagged, if they are done so, when egressing through a CPU
-port, the special tag field will be broken.
-
-BPDU egresses CPU port with VLAN tag egressing stacked, received on
-software:
-
-00:01:25.104821 AF Unknown (382365846), length 106:
- | STAG | | VLAN |
- 0x0000: 0000 6c27 614d 4143 0001 0000 8100 0001 ..l'aMAC........
- 0x0010: 0026 4242 0300 0000 0000 0000 6c27 614d .&BB........l'aM
- 0x0020: 4143 0000 0000 0000 6c27 614d 4143 0000 AC......l'aMAC..
- 0x0030: 0000 1400 0200 0f00 0000 0000 0000 0000 ................
-
-BPDU egresses CPU port with VLAN tag egressing untagged, received on
-software:
-
-00:23:56.628708 AF Unknown (25215488), length 64:
- | STAG |
- 0x0000: 0000 6c27 614d 4143 0001 0000 0026 4242 ..l'aMAC.....&BB
- 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC..
- 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC......
- 0x0030: 0200 0f00 0000 0000 0000 0000 ............
-
-BPDU egresses CPU port with VLAN tag egressing tagged, received on
-software:
-
-00:01:34.311963 AF Unknown (25215488), length 64:
- | Mess |
- 0x0000: 0000 6c27 614d 4143 0001 0001 0026 4242 ..l'aMAC.....&BB
- 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC..
- 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC......
- 0x0030: 0200 0f00 0000 0000 0000 0000 ............
-
-To prevent confusing the software, force the frame to egress UNTAGGED
-instead of CONSISTENT. This way, frames can't possibly be received TAGGED
-by software which would have the special tag field broken.
-
-VLAN Tag Egress Procedure
-
- For all frames, one of these options set the earliest in this order will
- apply to the frame:
-
- - EG_TAG in certain registers for certain frames.
- This will apply to frame with matching MAC DA or EtherType.
-
- - EG_TAG in the address table.
- This will apply to frame at its incoming port.
-
- - EG_TAG in the PVC register.
- This will apply to frame at its incoming port.
-
- - EG_CON and [EG_TAG per port] in the VLAN table.
- This will apply to frame at its outgoing port.
-
- - EG_TAG in the PCR register.
- This will apply to frame at its outgoing port.
-
- EG_TAG in certain registers for certain frames:
-
- PPPoE Discovery_ARP/RARP: PPP_EG_TAG and ARP_EG_TAG in the APC register.
- IGMP_MLD: IGMP_EG_TAG and MLD_EG_TAG in the IMC register.
- BPDU and PAE: BPDU_EG_TAG and PAE_EG_TAG in the BPC register.
- REV_01 and REV_02: R01_EG_TAG and R02_EG_TAG in the RGAC1 register.
- REV_03 and REV_0E: R03_EG_TAG and R0E_EG_TAG in the RGAC2 register.
- REV_10 and REV_20: R10_EG_TAG and R20_EG_TAG in the RGAC3 register.
- REV_21 and REV_UN: R21_EG_TAG and RUN_EG_TAG in the RGAC4 register.
-
-With this change, it can be observed that a bridge interface with stp_state
-and vlan_filtering enabled will properly block ports now.
-
-Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
-Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
-Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/net/dsa/mt7530.c | 23 +++++++++++++++--------
- drivers/net/dsa/mt7530.h | 9 ++++++++-
- 2 files changed, 23 insertions(+), 9 deletions(-)
-
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -1001,16 +1001,23 @@ unlock_exit:
- static void
- mt753x_trap_frames(struct mt7530_priv *priv)
- {
-- /* Trap BPDUs to the CPU port(s) */
-- mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
-+ /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them
-+ * VLAN-untagged.
-+ */
-+ mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK |
-+ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
-+ MT753X_BPDU_PORT_FW_MASK,
-+ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-+ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-+ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
-
-- /* Trap 802.1X PAE frames to the CPU port(s) */
-- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_PORT_FW_MASK,
-- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY));
--
-- /* Trap LLDP frames with :0E MAC DA to the CPU port(s) */
-- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_PORT_FW_MASK,
-+ /* Trap LLDP frames with :0E MAC DA to the CPU port(s) and egress them
-+ * VLAN-untagged.
-+ */
-+ mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK |
-+ MT753X_R0E_PORT_FW_MASK,
-+ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY));
- }
-
---- a/drivers/net/dsa/mt7530.h
-+++ b/drivers/net/dsa/mt7530.h
-@@ -63,12 +63,18 @@ enum mt753x_id {
-
- /* Registers for BPDU and PAE frame control*/
- #define MT753X_BPC 0x24
--#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0)
-+#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22)
-+#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x)
- #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16)
- #define MT753X_PAE_PORT_FW(x) FIELD_PREP(MT753X_PAE_PORT_FW_MASK, x)
-+#define MT753X_BPDU_EG_TAG_MASK GENMASK(8, 6)
-+#define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x)
-+#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0)
-
- /* Register for :03 and :0E MAC DA frame control */
- #define MT753X_RGAC2 0x2c
-+#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22)
-+#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
- #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16)
- #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
-
-@@ -251,6 +257,7 @@ enum mt7530_port_mode {
- enum mt7530_vlan_port_eg_tag {
- MT7530_VLAN_EG_DISABLED = 0,
- MT7530_VLAN_EG_CONSISTENT = 1,
-+ MT7530_VLAN_EG_UNTAGGED = 4,
- };
-
- enum mt7530_vlan_port_attr {
+++ /dev/null
-From 86c0c154a759f2af9612a04bdf29110f02dce956 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
-Date: Thu, 14 Mar 2024 12:33:42 +0300
-Subject: [PATCH 3/3] net: dsa: mt7530: fix handling of all link-local frames
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-[ Upstream commit 69ddba9d170bdaee1dc0eb4ced38d7e4bb7b92af ]
-
-Currently, the MT753X switches treat frames with :01-0D and :0F MAC DAs as
-regular multicast frames, therefore flooding them to user ports.
-
-On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE
-Std 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC
-DA must only be propagated to C-VLAN and MAC Bridge components. That means
-VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports,
-these frames are supposed to be processed by the CPU (software). So we make
-the switch only forward them to the CPU port. And if received from a CPU
-port, forward to a single port. The software is responsible of making the
-switch conform to the latter by setting a single port as destination port
-on the special tag.
-
-This switch intellectual property cannot conform to this part of the
-standard fully. Whilst the REV_UN frame tag covers the remaining :04-0D and
-:0F MAC DAs, it also includes :22-FF which the scope of propagation is not
-supposed to be restricted for these MAC DAs.
-
-Set frames with :01-03 MAC DAs to be trapped to the CPU port(s). Add a
-comment for the remaining MAC DAs.
-
-Note that the ingress port must have a PVID assigned to it for the switch
-to forward untagged frames. A PVID is set by default on VLAN-aware and
-VLAN-unaware ports. However, when the network interface that pertains to
-the ingress port is attached to a vlan_filtering enabled bridge, the user
-can remove the PVID assignment from it which would prevent the link-local
-frames from being trapped to the CPU port. I am yet to see a way to forward
-link-local frames while preventing other untagged frames from being
-forwarded too.
-
-Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
-Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
-Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/net/dsa/mt7530.c | 37 +++++++++++++++++++++++++++++++++----
- drivers/net/dsa/mt7530.h | 13 +++++++++++++
- 2 files changed, 46 insertions(+), 4 deletions(-)
-
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -998,6 +998,21 @@ unlock_exit:
- mutex_unlock(&priv->reg_mutex);
- }
-
-+/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std
-+ * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA
-+ * must only be propagated to C-VLAN and MAC Bridge components. That means
-+ * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports,
-+ * these frames are supposed to be processed by the CPU (software). So we make
-+ * the switch only forward them to the CPU port. And if received from a CPU
-+ * port, forward to a single port. The software is responsible of making the
-+ * switch conform to the latter by setting a single port as destination port on
-+ * the special tag.
-+ *
-+ * This switch intellectual property cannot conform to this part of the standard
-+ * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC
-+ * DAs, it also includes :22-FF which the scope of propagation is not supposed
-+ * to be restricted for these MAC DAs.
-+ */
- static void
- mt753x_trap_frames(struct mt7530_priv *priv)
- {
-@@ -1012,13 +1027,27 @@ mt753x_trap_frames(struct mt7530_priv *p
- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
-
-- /* Trap LLDP frames with :0E MAC DA to the CPU port(s) and egress them
-- * VLAN-untagged.
-+ /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress
-+ * them VLAN-untagged.
-+ */
-+ mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK |
-+ MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK |
-+ MT753X_R01_PORT_FW_MASK,
-+ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-+ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-+ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-+ MT753X_BPDU_CPU_ONLY);
-+
-+ /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress
-+ * them VLAN-untagged.
- */
- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK |
-- MT753X_R0E_PORT_FW_MASK,
-+ MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK |
-+ MT753X_R03_PORT_FW_MASK,
- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY));
-+ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-+ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-+ MT753X_BPDU_CPU_ONLY);
- }
-
- static int
---- a/drivers/net/dsa/mt7530.h
-+++ b/drivers/net/dsa/mt7530.h
-@@ -71,12 +71,25 @@ enum mt753x_id {
- #define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x)
- #define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0)
-
-+/* Register for :01 and :02 MAC DA frame control */
-+#define MT753X_RGAC1 0x28
-+#define MT753X_R02_EG_TAG_MASK GENMASK(24, 22)
-+#define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x)
-+#define MT753X_R02_PORT_FW_MASK GENMASK(18, 16)
-+#define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x)
-+#define MT753X_R01_EG_TAG_MASK GENMASK(8, 6)
-+#define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x)
-+#define MT753X_R01_PORT_FW_MASK GENMASK(2, 0)
-+
- /* Register for :03 and :0E MAC DA frame control */
- #define MT753X_RGAC2 0x2c
- #define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22)
- #define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
- #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16)
- #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
-+#define MT753X_R03_EG_TAG_MASK GENMASK(8, 6)
-+#define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x)
-+#define MT753X_R03_PORT_FW_MASK GENMASK(2, 0)
-
- enum mt753x_bpdu_port_fw {
- MT753X_BPDU_FOLLOW_MFC,
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-@@ -31,12 +31,7 @@
+@@ -30,12 +30,7 @@
#define MSM_ID_SMEM 137
enum _msm8996_version {
MSM8996_V3,
-@@ -154,12 +149,12 @@ static enum _msm8996_version qcom_cpufre
+@@ -153,12 +148,12 @@ static enum _msm8996_version qcom_cpufre
msm_id++;
switch ((enum _msm_id)*msm_id) {
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-@@ -29,16 +29,8 @@
+@@ -28,16 +28,8 @@
#include <linux/slab.h>
#include <linux/soc/qcom/smem.h>
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
-@@ -135,60 +127,32 @@ static void get_krait_bin_format_b(struc
+@@ -134,60 +126,32 @@ static void get_krait_bin_format_b(struc
dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
}
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
# CONFIG_TEE is not set
+# CONFIG_TEGRA210_ADMA is not set
+# CONFIG_TEGRA_ACONNECT is not set
# CONFIG_TEGRA_AHB is not set
# CONFIG_TEGRA_HOST1X is not set
# CONFIG_TEHUTI is not set
--- a/net/core/dev.c
+++ b/net/core/dev.c
-@@ -7625,6 +7625,48 @@ static void __netdev_adjacent_dev_unlink
+@@ -7628,6 +7628,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
-@@ -7676,6 +7718,7 @@ static int __netdev_upper_dev_link(struc
+@@ -7679,6 +7721,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
-@@ -7772,6 +7815,7 @@ static void __netdev_upper_dev_unlink(st
+@@ -7775,6 +7818,7 @@ static void __netdev_upper_dev_unlink(st
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
-@@ -8824,6 +8868,7 @@ int dev_set_mac_address(struct net_devic
+@@ -8827,6 +8871,7 @@ int dev_set_mac_address(struct net_devic
if (err)
return err;
dev->addr_assign_type = NET_ADDR_SET;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4941,6 +4941,8 @@ static int mtk_probe(struct platform_dev
+@@ -4940,6 +4940,8 @@ static int mtk_probe(struct platform_dev
* for NAPI to work
*/
init_dummy_netdev(ð->dummy_dev);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1562,12 +1562,28 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1561,12 +1561,28 @@ static void mtk_wake_queue(struct mtk_et
}
}
bool gso = false;
int tx_num;
-@@ -1589,6 +1605,18 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1588,6 +1604,18 @@ static netdev_tx_t mtk_start_xmit(struct
return NETDEV_TX_BUSY;
}
/* TSO: fill MSS info in tcp checksum field */
if (skb_is_gso(skb)) {
if (skb_cow_head(skb, 0)) {
-@@ -1604,8 +1632,14 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1603,8 +1631,14 @@ static netdev_tx_t mtk_start_xmit(struct
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -767,6 +767,7 @@ static void mtk_mac_link_up(struct phyli
+@@ -766,6 +766,7 @@ static void mtk_mac_link_up(struct phyli
MAC_MCR_FORCE_RX_FC);
/* Configure speed */
switch (speed) {
case SPEED_2500:
case SPEED_1000:
-@@ -3348,6 +3349,9 @@ found:
+@@ -3347,6 +3348,9 @@ found:
if (dp->index >= MTK_QDMA_NUM_QUEUES)
return NOTIFY_DONE;
+++ /dev/null
-From ef5976ae4e117fae9a61bb3c0f8319a917a425ea Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Mon, 11 Mar 2024 17:43:28 +0000
-Subject: [PATCH] net: mediatek: mtk_eth_soc: release MAC_MCR_FORCE_LINK only when MAC is up
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Clearing bit MAC_MCR_FORCE_LINK which forces the link down too early
-can result in MAC ending up in a broken/blocked state.
-
-Fix this by handling this bit in the .mac_link_up and .mac_link_down
-calls instead of in .mac_finish.
-
-Fixes: b8fc9f30821ec ("net: ethernet: mediatek: Add basic PHYLINK support")
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -662,8 +662,7 @@ static int mtk_mac_finish(struct phylink
- mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
- mcr_new = mcr_cur;
- mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
-- MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK |
-- MAC_MCR_RX_FIFO_CLR_DIS;
-+ MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_RX_FIFO_CLR_DIS;
-
- /* Only update control register when needed! */
- if (mcr_new != mcr_cur)
-@@ -679,7 +678,7 @@ static void mtk_mac_link_down(struct phy
- phylink_config);
- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
-
-- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN);
-+ mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK);
- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
- }
-
-@@ -788,7 +787,7 @@ static void mtk_mac_link_up(struct phyli
- if (rx_pause)
- mcr |= MAC_MCR_FORCE_RX_FC;
-
-- mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN;
-+ mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK;
- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
- }
-
+++ /dev/null
-From c8262ebbf7ca546dd5ead3c0383a89eb401627ff Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Wed, 13 Mar 2024 17:55:02 +0000
-Subject: [PATCH] net: ethernet: mtk_eth_soc: fix PPE hanging issue
-
-A patch to resolve an issue was found in MediaTek's GPL-licensed SDK:
-In the mtk_ppe_stop() function, the PPE scan mode is not disabled before
-disabling the PPE. This can potentially lead to a hang during the process
-of disabling the PPE.
-
-Without this patch, the PPE may experience a hang during the reboot test.
-
-Reference: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/b40da332dfe763932a82f9f62a4709457a15dd6c
-
-Suggested-by: Bc-bocun Chen <bc-bocun.chen@mediatek.com>
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +++++++++++-------
- 1 file changed, 11 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/mediatek/mtk_ppe.c
-+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
-@@ -1002,7 +1002,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
- MTK_PPE_KEEPALIVE_DISABLE) |
- FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |
- FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,
-- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
-+ MTK_PPE_SCAN_MODE_CHECK_AGE) |
- FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
- MTK_PPE_ENTRIES_SHIFT);
- if (mtk_is_netsys_v2_or_greater(ppe->eth))
-@@ -1098,17 +1098,21 @@ int mtk_ppe_stop(struct mtk_ppe *ppe)
-
- mtk_ppe_cache_enable(ppe, false);
-
-- /* disable offload engine */
-- ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
-- ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
--
- /* disable aging */
- val = MTK_PPE_TB_CFG_AGE_NON_L4 |
- MTK_PPE_TB_CFG_AGE_UNBIND |
- MTK_PPE_TB_CFG_AGE_TCP |
- MTK_PPE_TB_CFG_AGE_UDP |
-- MTK_PPE_TB_CFG_AGE_TCP_FIN;
-+ MTK_PPE_TB_CFG_AGE_TCP_FIN |
-+ MTK_PPE_TB_CFG_SCAN_MODE;
- ppe_clear(ppe, MTK_PPE_TB_CFG, val);
-
-- return mtk_ppe_wait_busy(ppe);
-+ if (mtk_ppe_wait_busy(ppe))
-+ return -ETIMEDOUT;
-+
-+ /* disable offload engine */
-+ ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
-+ ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
-+
-+ return 0;
- }
void netif_napi_add_weight(struct net_device *dev, struct napi_struct *napi,
int (*poll)(struct napi_struct *, int), int weight)
{
-@@ -11168,6 +11239,9 @@ static int dev_cpu_dead(unsigned int old
+@@ -11171,6 +11242,9 @@ static int dev_cpu_dead(unsigned int old
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_enable();
#ifdef CONFIG_RPS
remsd = oldsd->rps_ipi_list;
oldsd->rps_ipi_list = NULL;
-@@ -11480,6 +11554,7 @@ static int __init net_dev_init(void)
+@@ -11483,6 +11557,7 @@ static int __init net_dev_init(void)
INIT_CSD(&sd->defer_csd, trigger_rx_softirq, sd);
spin_lock_init(&sd->defer_lock);
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -1711,4 +1711,19 @@ config GPIO_SIM
+@@ -1712,4 +1712,19 @@ config GPIO_SIM
endmenu
help
--- a/init/main.c
+++ b/init/main.c
-@@ -611,6 +611,29 @@ static inline void setup_nr_cpu_ids(void
+@@ -612,6 +612,29 @@ static inline void setup_nr_cpu_ids(void
static inline void smp_prepare_cpus(unsigned int maxcpus) { }
#endif
/*
* We need to store the untouched command line for future reference.
* We also need to store the touched command line since the parameter
-@@ -958,6 +981,7 @@ asmlinkage __visible void __init __no_sa
+@@ -959,6 +982,7 @@ asmlinkage __visible void __init __no_sa
pr_notice("%s", linux_banner);
early_security_init();
setup_arch(&command_line);
#include <linux/bootconfig.h>
#include <linux/console.h>
#include <linux/nmi.h>
-@@ -995,6 +996,17 @@ asmlinkage __visible void __init __no_sa
+@@ -996,6 +997,17 @@ asmlinkage __visible void __init __no_sa
pr_notice("Kernel command line: %s\n", saved_command_line);
/* parameters may set static keys */
jump_label_init();
};
timer {
-@@ -239,6 +280,11 @@
+@@ -240,6 +281,11 @@
reg = <0 0x15010000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
};
wed1: wed@15011000 {
-@@ -247,6 +293,25 @@
+@@ -248,6 +294,25 @@
reg = <0 0x15011000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -223,6 +223,21 @@
+@@ -224,6 +224,21 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -279,6 +279,20 @@
+@@ -280,6 +280,20 @@
status = "disabled";
};
#address-cells = <1>;
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -294,6 +294,34 @@
+@@ -295,6 +295,34 @@
status = "disabled";
};
pinctrl-names = "default", "dbdc";
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -322,6 +322,61 @@
+@@ -323,6 +323,61 @@
status = "disabled";
};
function = "spi";
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -345,6 +345,21 @@
+@@ -346,6 +346,21 @@
status = "disabled";
};
/ {
compatible = "mediatek,mt7986a";
-@@ -360,6 +361,57 @@
+@@ -361,6 +362,57 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -240,6 +240,20 @@
+@@ -241,6 +241,20 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -337,6 +337,15 @@
+@@ -338,6 +338,15 @@
status = "disabled";
};
ssusb: usb@11200000 {
compatible = "mediatek,mt7986-xhci",
"mediatek,mtk-xhci";
-@@ -375,6 +384,21 @@
+@@ -376,6 +385,21 @@
status = "disabled";
};
pcie: pcie@11280000 {
compatible = "mediatek,mt7986-pcie",
"mediatek,mt8192-pcie";
-@@ -426,6 +450,17 @@
+@@ -427,6 +451,17 @@
};
};
usb_phy: t-phy@11e10000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
-@@ -567,5 +602,4 @@
+@@ -568,5 +603,4 @@
memory-region = <&wmcpu_emi>;
};
};
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -602,4 +602,32 @@
+@@ -603,4 +603,32 @@
memory-region = <&wmcpu_emi>;
};
};
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -610,22 +610,34 @@
+@@ -611,22 +611,34 @@
thermal-sensors = <&thermal 0>;
trips {
memory@40000000 {
- reg = <0 0x40000000 0 0x20000000>;
+ reg = <0 0x40000000 0 0x40000000>;
+ device_type = "memory";
};
- reg_1p8v: regulator-1p8v {
-@@ -132,22 +131,22 @@
+@@ -133,22 +132,22 @@
port@0 {
reg = <0>;
};
port@4 {
-@@ -240,7 +239,22 @@
+@@ -241,7 +240,22 @@
status = "okay";
};
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
-@@ -517,11 +531,11 @@
+@@ -518,11 +532,11 @@
};
&sata {
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -108,10 +108,6 @@
+@@ -109,10 +109,6 @@
status = "disabled";
};
pinctrl-0 = <&irrx_pins>;
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-@@ -89,10 +89,6 @@
+@@ -90,10 +90,6 @@
status = "disabled";
};
};
chosen {
-@@ -160,22 +161,22 @@
+@@ -161,22 +162,22 @@
port@1 {
reg = <1>;
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -556,12 +556,16 @@
+@@ -557,12 +557,16 @@
status = "okay";
};
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -253,14 +253,42 @@
+@@ -254,14 +254,42 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-@@ -534,6 +534,65 @@
+@@ -535,6 +535,65 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-@@ -575,7 +575,7 @@
+@@ -576,7 +576,7 @@
reg = <0x140000 0x0080000>;
};
label = "Factory";
reg = <0x1c0000 0x0100000>;
};
-@@ -636,5 +636,6 @@
+@@ -637,5 +637,6 @@
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&wmac_pins>;
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -154,6 +154,10 @@
+@@ -155,6 +155,10 @@
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-@@ -548,6 +548,7 @@
+@@ -549,6 +549,7 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;
if (mdata->dev_comp->need_pad_sel && spi->cs_gpiod)
/* CS de-asserted, gpiolib will handle inversion */
gpiod_direction_output(spi->cs_gpiod, 0);
-@@ -1138,6 +1126,10 @@ static int mtk_spi_probe(struct platform
+@@ -1140,6 +1128,10 @@ static int mtk_spi_probe(struct platform
mdata = spi_master_get_devdata(master);
mdata->dev_comp = device_get_match_data(dev);
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
-@@ -832,6 +832,21 @@ static irqreturn_t mtk_spi_interrupt(int
+@@ -834,6 +834,21 @@ static irqreturn_t mtk_spi_interrupt(int
return IRQ_HANDLED;
}
static int mtk_spi_mem_adjust_op_size(struct spi_mem *mem,
struct spi_mem_op *op)
{
-@@ -1122,6 +1137,7 @@ static int mtk_spi_probe(struct platform
+@@ -1124,6 +1139,7 @@ static int mtk_spi_probe(struct platform
master->setup = mtk_spi_setup;
master->set_cs_timing = mtk_spi_set_hw_cs_timing;
master->use_gpio_descriptors = true;
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -248,6 +248,28 @@
+@@ -249,6 +249,28 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -312,7 +312,7 @@
+@@ -313,7 +313,7 @@
/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
* SATA functions. i.e. output-high: PCIe, output-low: SATA
*/
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -639,5 +639,28 @@
+@@ -640,5 +640,28 @@
};
&wmac {
};
cpus {
-@@ -233,6 +236,26 @@
+@@ -234,6 +237,26 @@
assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
non-removable;
};
&mmc1 {
-@@ -249,6 +272,26 @@
+@@ -250,6 +273,26 @@
vqmmc-supply = <®_3p3v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
};
&nandc {
-@@ -283,14 +326,29 @@
+@@ -284,14 +327,29 @@
};
partition@80000 {
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
-@@ -1225,8 +1225,15 @@ static int mtk_spi_probe(struct platform
+@@ -1227,8 +1227,15 @@ static int mtk_spi_probe(struct platform
if (ret < 0)
return dev_err_probe(dev, ret, "failed to enable hclk\n");
};
timer {
-@@ -540,10 +534,11 @@
+@@ -541,10 +535,11 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
};
wed1: wed@15011000 {
-@@ -553,10 +548,11 @@
+@@ -554,10 +549,11 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
};
wo_ccif0: syscon@151a5000 {
-@@ -573,6 +569,11 @@
+@@ -574,6 +570,11 @@
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
};
wo_data: wo-data@4fd80000 {
reg = <0 0x4fd80000 0 0x240000>;
no-map;
-@@ -533,11 +523,10 @@
+@@ -534,11 +524,10 @@
reg = <0 0x15010000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
-@@ -547,11 +536,10 @@
+@@ -548,11 +537,10 @@
reg = <0 0x15011000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
-@@ -569,6 +557,16 @@
+@@ -570,6 +558,16 @@
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
};
};
timer {
-@@ -523,10 +513,11 @@
+@@ -524,10 +514,11 @@
reg = <0 0x15010000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
-@@ -536,10 +527,11 @@
+@@ -537,10 +528,11 @@
reg = <0 0x15011000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
-@@ -567,6 +559,16 @@
+@@ -568,6 +560,16 @@
reg = <0 0x151f0000 0 0x8000>;
};
}
--- a/init/main.c
+++ b/init/main.c
-@@ -112,6 +112,10 @@
+@@ -113,6 +113,10 @@
#include <kunit/test.h>
static int kernel_init(void *);
extern void init_IRQ(void);
-@@ -993,6 +997,18 @@ asmlinkage __visible void __init __no_sa
+@@ -994,6 +998,18 @@ asmlinkage __visible void __init __no_sa
page_alloc_init();
pr_notice("Kernel command line: %s\n", saved_command_line);
CONFIG_INTEL_IOMMU=y
# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set
CONFIG_INTEL_IOMMU_FLOPPY_WA=y
+CONFIG_INTEL_IOMMU_PERF_EVENTS=y
# CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set
# CONFIG_INTEL_IOMMU_SVM is not set
# CONFIG_INTEL_IPS is not set
projects / openwrt / staging / stintel.git / commitdiff