MIPS: Cavium OCTEON multiplier state preservation.

For OCTEON, implement a save and restore of the multiplier state
across context switches.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 4c37c4e5f72e4e51b578148f2e8943554da1b41a..db0fa7b5aeaf3f849d0a197f63c7a1ba8a487498 100644 (file)
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -194,6 +194,19 @@
                LONG_S  $31, PT_R31(sp)
                ori     $28, sp, _THREAD_MASK
                xori    $28, _THREAD_MASK
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+               .set    mips64
+               pref    0, 0($28)       /* Prefetch the current pointer */
+               pref    0, PT_R31(sp)   /* Prefetch the $31(ra) */
+               /* The Octeon multiplier state is affected by general multiply
+                   instructions. It must be saved before and kernel code might
+                   corrupt it */
+               jal     octeon_mult_save
+               LONG_L  v1, 0($28)  /* Load the current pointer */
+                        /* Restore $31(ra) that was changed by the jal */
+               LONG_L  ra, PT_R31(sp)
+               pref    0, 0(v1)    /* Prefetch the current thread */
+#endif
                .set    pop
                .endm
 
@@ -324,6 +337,10 @@
                DVPE    5                               # dvpe a1
                jal     mips_ihb
 #endif /* CONFIG_MIPS_MT_SMTC */
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+               /* Restore the Octeon multiplier state */
+               jal     octeon_mult_restore
+#endif
                mfc0    a0, CP0_STATUS
                ori     a0, STATMASK
                xori    a0, STATMASK