#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
+#ifdef CONFIG_FSL_ESDHC
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int get_clocks(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_FSL_ESDHC
gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
#endif
#include <asm/blackfin.h>
#include <asm/mach-common/bits/uart.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_UART_CONSOLE
#include "serial.h"
*/
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
serial_set_baud(gd->baudrate);
}
{
volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
- wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR;
-r */
+ wdt->sr = 0x5555; /* reset watchdog counter */
wdt->sr = 0xAAAA;
wdt->cr = 0; /* disable watchdog timer */
#include <asm/immap.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* get_clocks() fills in gd->cpu_clock and gd->bus_clk
*/
int get_clocks(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bus_clk = CONFIG_SYS_CLK;
gd->cpu_clk = (gd->bus_clk * 2);
#include <miiphy.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
extern int cpu_init(void);
extern int board_init(void);
extern int dram_init(void);
static int sh_flash_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_flashsize = flash_init();
printf("FLASH: %ldMB\n", gd->bd->bi_flashsize / (1024*1024));
#if defined(CONFIG_CMD_NET)
static int sh_net_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
return 0;
}
void sh_generic_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: ESPT-GIGA\n");
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/mach-types.h>
#include "igep0020.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* GPMC definitions for LAN9221 chips */
static const u32 gpmc_lan_config[] = {
NET_LAN9221_GPMC_CONFIG1,
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_IGEP0020;
#include <asm/mach-types.h>
#include "igep0030.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_IGEP0030;
#include <pci.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
extern void init_AVR_DUART(void);
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
char *p;
bd_t *bd = gd->bd;
#include <asm/mach-types.h>
#include "zoom1.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP;
#include "zoom2.h"
#include "zoom2_serial.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* This the the zoom2, board specific, gpmc configuration for the
* quad uart on the debug board. The more general gpmc configurations
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
u32 *gpmc_config;
gpmc_init (); /* in SRAM or SDRAM, finish GPMC */
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: MPR2\n");
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("SDRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LED_BASE 0xB0800000
int checkboard(void)
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LED_BASE 0xB0800000
int checkboard(void)
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <common.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n");
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/mach-types.h>
#include "overo.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define TWL4030_I2C_BUS 0
#define EXPANSION_EEPROM_I2C_BUS 2
#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OVERO;
#include <asm/mach-types.h>
#include "pandora.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define TWL4030_BB_CFG_BBCHEN (1 << 4)
#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
#define TWL4030_BB_CFG_BBISEL_500UA 2
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: Renesas MigoR\n");
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* PRI control register */
#define PRPRICR5 0xFF800048 /* LMB */
#define PRPRICR5_D 0x2a
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: Renesas Solutions R2D Plus\n");
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <netdev.h>
#include "r7780mp.h"
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
#if defined(CONFIG_R7780MP)
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: Renesas Technology RSK7203\n");
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define CPU_CMDREG 0xB1000006
#define PDCR 0xffef0006
#define PECR 0xffef0008
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <asm/pci.h>
#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
#include <netdev.h>
#include <asm/arch/s3c6400.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
#define CS8900_Tacs 0x0 /* 0clk address set-up */
#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
cs8900_pre_init();
/* NOR-flash in SROM0 */
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#define BEAGLE_NO_EEPROM 0xffffffff
+DECLARE_GLOBAL_DATA_PTR;
+
static struct {
unsigned int device_vendor;
unsigned char revision;
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
#include <asm/mach-types.h>
#include "evm.h"
+DECLARE_GLOBAL_DATA_PTR;
+
static u32 omap3_evm_version;
u32 get_omap3_evm_rev(void)
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
#include <asm/mach-types.h>
#include "sdp.h"
+DECLARE_GLOBAL_DATA_PTR;
+
const omap3_sysinfo sysinfo = {
DDR_DISCRETE,
"OMAP3 SDP3430 board",
*/
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* TODO: Dynamically pop out CS mapping and program accordingly */
/* Configure devices for default ON ON ON settings */
#include "omap24xx_i2c.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define I2C_TIMEOUT 1000
static void wait_for_bb (void);
void i2c_init (int speed, int slaveadd)
{
- DECLARE_GLOBAL_DATA_PTR;
int psc, fsscll, fssclh;
int hsscll = 0, hssclh = 0;
u32 scll, sclh;
#include <asm/arch/s3c6400.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SERIAL1
#define UART_NR S3C64XX_UART0
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
u32 pclk = get_PCLK();
u32 baudrate = gd->baudrate;
#include <asm/arch/clk.h>
#include <serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
u32 offset = dev_index * sizeof(struct s5p_uart);
void serial_setbrg_dev(const int dev_index)
{
- DECLARE_GLOBAL_DATA_PTR;
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
u32 uclk = get_uart_clk(dev_index);
u32 baudrate = gd->baudrate;
#include <asm/io.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONS_SCIF0)
# define SCIF_BASE SCIF0_BASE
#elif defined(CONFIG_CONS_SCIF1)
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR);
}