AArch64: Remove EL-agnostic TLB helper functions

Also, don't invalidate the TLBs in disable_mmu() function, it's better
to do it in enable_mmu() function just before actually enabling the
MMU.

Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1

diff --git a/include/aarch64/arch_helpers.h b/include/aarch64/arch_helpers.h
index b571a5db6ac21b7ab40a21bceeb2cb15e00eebc4..9dc6b924cecf1de226db9831b9bdd9b1104b917b 100644 (file)
--- a/include/aarch64/arch_helpers.h
+++ b/include/aarch64/arch_helpers.h
@@ -48,8 +48,6 @@
 /*******************************************************************************
  * TLB maintenance accessor prototypes
  ******************************************************************************/
-extern void tlbiall(void);
-extern void tlbiallis(void);
 extern void tlbialle1(void);
 extern void tlbialle1is(void);
 extern void tlbialle2(void);

diff --git a/lib/arch/aarch64/tlb_helpers.S b/lib/arch/aarch64/tlb_helpers.S
index 8377f2c6a2dbf8436db29b791d4c005ba77d980d..eef7546c5292a636efda07a7dfb472b1664facb8 100644 (file)
--- a/lib/arch/aarch64/tlb_helpers.S
+++ b/lib/arch/aarch64/tlb_helpers.S
@@ -30,8 +30,6 @@
 
 #include <arch_helpers.h>
 
-       .globl  tlbiall
-       .globl  tlbiallis
        .globl  tlbialle1
        .globl  tlbialle1is
        .globl  tlbialle2
@@ -43,26 +41,6 @@
 
        .section        .text, "ax"
 
-tlbiall:; .type tlbiall, %function
-       mrs     x0, CurrentEl
-       cmp     x0, #(MODE_EL1 << MODE_EL_SHIFT)
-       b.eq    tlbialle1
-       cmp     x0, #(MODE_EL2 << MODE_EL_SHIFT)
-       b.eq    tlbialle2
-       cmp     x0, #(MODE_EL3 << MODE_EL_SHIFT)
-       b.eq    tlbialle3
-
-
-tlbiallis:; .type tlbiallis, %function
-       mrs     x0, CurrentEl
-       cmp     x0, #(MODE_EL1 << MODE_EL_SHIFT)
-       b.eq    tlbialle1is
-       cmp     x0, #(MODE_EL2 << MODE_EL_SHIFT)
-       b.eq    tlbialle2is
-       cmp     x0, #(MODE_EL3 << MODE_EL_SHIFT)
-       b.eq    tlbialle3is
-
-
 tlbialle1:; .type tlbialle1, %function
        tlbi    alle1
        dsb     sy

diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index 78a44a57301cb45aab29b77a67456d5df657a26d..0b5f4ebeb9d65b4d78f8bde5595c4afdc1e83e1f 100644 (file)
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -461,7 +461,7 @@ void enable_mmu()
                  TCR_RGN_INNER_WBA | TCR_T0SZ_4GB;
        if (GET_EL(current_el) == MODE_EL3) {
                tcr |= TCR_EL3_RES1;
-               /* Invalidate all TLBs */
+               /* Invalidate EL3 TLBs */
                tlbialle3();
        } else {
                /* Invalidate EL1 TLBs */
@@ -491,9 +491,6 @@ void disable_mmu(void)
        write_ttbr0(0);
        write_sctlr(0);
 
-       /* Invalidate TLBs of the CurrentEL */
-       tlbiall();
-
        /* Flush the caches */
        dcsw_op_all(DCCISW);