rtl8xxxu: Provide special handling when writing RF regs on 8192eu

The 8192eu requires clearing/restoring bit 17 in REG_FPGA0_POWER_SAVE
before/after writing RF registers.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
index dc67f5b2dbaeda8f8c3e621a6e8f6efd688535b0..ad5b3d3f70842bc703c89e44df4c5b28aae080b1 100644 (file)
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
@@ -1896,7 +1896,7 @@ static int rtl8xxxu_write_rfreg(struct rtl8xxxu_priv *priv,
                                enum rtl8xxxu_rfpath path, u8 reg, u32 data)
 {
        int ret, retval;
-       u32 dataaddr;
+       u32 dataaddr, val32;
 
        if (rtl8xxxu_debug & RTL8XXXU_DEBUG_RFREG_WRITE)
                dev_info(&priv->udev->dev, "%s(%02x) = 0x%06x\n",
@@ -1905,6 +1905,12 @@ static int rtl8xxxu_write_rfreg(struct rtl8xxxu_priv *priv,
        data &= FPGA0_LSSI_PARM_DATA_MASK;
        dataaddr = (reg << FPGA0_LSSI_PARM_ADDR_SHIFT) | data;
 
+       if (priv->rtl_chip == RTL8192E) {
+               val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE);
+               val32 &= ~0x20000;
+               rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32);
+       }
+
        /* Use XB for path B */
        ret = rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].lssiparm, dataaddr);
        if (ret != sizeof(dataaddr))
@@ -1914,6 +1920,12 @@ static int rtl8xxxu_write_rfreg(struct rtl8xxxu_priv *priv,
 
        udelay(1);
 
+       if (priv->rtl_chip == RTL8192E) {
+               val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE);
+               val32 |= 0x20000;
+               rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32);
+       }
+
        return retval;
 }