arm64: Rename cpuid_feature field extract routines
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Tue, 26 Jan 2016 10:58:16 +0000 (10:58 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Thu, 25 Feb 2016 10:33:08 +0000 (10:33 +0000)
Now that we have a clear understanding of the sign of a feature,
rename the routines to reflect the sign, so that it is not misused.
The cpuid_feature_extract_field() now accepts a 'sign' parameter.

Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/cpufeature.h
arch/arm64/include/asm/kvm_mmu.h
arch/arm64/kernel/cpufeature.c
arch/arm64/kernel/debug-monitors.c
arch/arm64/kvm/sys_regs.c
arch/arm64/mm/context.c

index 42e492a9e0fdfeb72dc604bd992c2fc433414547..be88aef01f3defe9173ec5223617c8bb587c0c46 100644 (file)
@@ -121,15 +121,15 @@ static inline void cpus_set_cap(unsigned int num)
 }
 
 static inline int __attribute_const__
-cpuid_feature_extract_field_width(u64 features, int field, int width)
+cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
 {
        return (s64)(features << (64 - width - field)) >> (64 - width);
 }
 
 static inline int __attribute_const__
-cpuid_feature_extract_field(u64 features, int field)
+cpuid_feature_extract_signed_field(u64 features, int field)
 {
-       return cpuid_feature_extract_field_width(features, field, 4);
+       return cpuid_feature_extract_signed_field_width(features, field, 4);
 }
 
 static inline unsigned int __attribute_const__
@@ -149,17 +149,23 @@ static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
        return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 }
 
+static inline int __attribute_const__
+cpuid_feature_extract_field(u64 features, int field, bool sign)
+{
+       return (sign) ?
+               cpuid_feature_extract_signed_field(features, field) :
+               cpuid_feature_extract_unsigned_field(features, field);
+}
+
 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
 {
-       return ftrp->sign ?
-               cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) :
-               cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width);
+       return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
 }
 
 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 {
-       return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
-               cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
+       return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
+               cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 }
 
 void __init setup_cpu_features(void);
index 736433912a1eb69a0398fa2f01d78cff88533893..2ac4a22d311992e6ad9e04435cbf2b682c3780b6 100644 (file)
@@ -307,7 +307,7 @@ static inline unsigned int kvm_get_vmid_bits(void)
 {
        int reg = read_system_reg(SYS_ID_AA64MMFR1_EL1);
 
-       return (cpuid_feature_extract_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
+       return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
 }
 
 #endif /* __ASSEMBLY__ */
index f0017ef3628a16ff7226c40abc997aa677eb871e..ffe44e70c99fb4b67e53a8cf3a28d77151c6183b 100644 (file)
@@ -618,7 +618,7 @@ u64 read_system_reg(u32 id)
 static bool
 feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
 {
-       int val = cpuid_feature_extract_field(reg, entry->field_pos);
+       int val = cpuid_feature_extract_field(reg, entry->field_pos, entry->sign);
 
        return val >= entry->min_field_value;
 }
index c1492ba1f6d14e71c263fa26904fab9980439b4f..4076a5a7a9759a2025146aa5c0e85565f46e9176 100644 (file)
@@ -34,7 +34,7 @@
 /* Determine debug architecture. */
 u8 debug_monitors_arch(void)
 {
-       return cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1),
+       return cpuid_feature_extract_unsigned_field(read_system_reg(SYS_ID_AA64DFR0_EL1),
                                                ID_AA64DFR0_DEBUGVER_SHIFT);
 }
 
index 2e90371cfb378b0e064667506a2b74c9275cacfb..6f4156f55e7cf34510767db976419d4c48d2f598 100644 (file)
@@ -688,7 +688,7 @@ static bool trap_dbgidr(struct kvm_vcpu *vcpu,
        } else {
                u64 dfr = read_system_reg(SYS_ID_AA64DFR0_EL1);
                u64 pfr = read_system_reg(SYS_ID_AA64PFR0_EL1);
-               u32 el3 = !!cpuid_feature_extract_field(pfr, ID_AA64PFR0_EL3_SHIFT);
+               u32 el3 = !!cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR0_EL3_SHIFT);
 
                p->regval = ((((dfr >> ID_AA64DFR0_WRPS_SHIFT) & 0xf) << 28) |
                             (((dfr >> ID_AA64DFR0_BRPS_SHIFT) & 0xf) << 24) |
index 6b5783f6eb0ea3888acce991fb97088a32e7ea19..6c989f06617f90d3547c6b147b34b57354f566a1 100644 (file)
@@ -45,7 +45,7 @@ static cpumask_t tlb_flush_pending;
 static u32 get_cpu_asid_bits(void)
 {
        u32 asid;
-       int fld = cpuid_feature_extract_field(read_cpuid(SYS_ID_AA64MMFR0_EL1),
+       int fld = cpuid_feature_extract_unsigned_field(read_cpuid(SYS_ID_AA64MMFR0_EL1),
                                                ID_AA64MMFR0_ASID_SHIFT);
 
        switch (fld) {