list_move(&bo_base->vm_status, &vm->moved);
spin_unlock(&vm->moved_lock);
} else {
+ r = amdgpu_ttm_alloc_gart(&bo->tbo);
+ if (r)
+ break;
list_move(&bo_base->vm_status, &vm->relocated);
}
}
if (r)
goto error;
+ r = amdgpu_ttm_alloc_gart(&bo->tbo);
+ if (r)
+ return r;
+
r = amdgpu_job_alloc_with_ib(adev, 64, &job);
if (r)
goto error;
bp->size = amdgpu_vm_bo_size(adev, level);
bp->byte_align = AMDGPU_GPU_PAGE_SIZE;
bp->domain = AMDGPU_GEM_DOMAIN_VRAM;
- bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
+ if (bp->size <= PAGE_SIZE && adev->asic_type >= CHIP_VEGA10 &&
+ adev->flags & AMD_IS_APU)
+ bp->domain |= AMDGPU_GEM_DOMAIN_GTT;
+ bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain);
+ bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
+ AMDGPU_GEM_CREATE_CPU_GTT_USWC;
if (vm->use_cpu_for_update)
bp->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
else