drm/tegra: dp: Turn link capabilities into booleans

Rather than storing capabilities as flags in an integer, use a separate
boolean per capability. This simplifies the code that checks for these
capabilities.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
index e55efd46a7d98678339d5feeed5da59163e1e6e3..e7602fc39a4a0690b030256468d71b9ff3392530 100644 (file)
--- a/drivers/gpu/drm/tegra/dp.c
+++ b/drivers/gpu/drm/tegra/dp.c
@@ -8,6 +8,17 @@
 
 #include "dp.h"
 
+static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps)
+{
+       caps->enhanced_framing = false;
+}
+
+void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
+                          const struct drm_dp_link_caps *src)
+{
+       dest->enhanced_framing = src->enhanced_framing;
+}
+
 static void drm_dp_link_reset(struct drm_dp_link *link)
 {
        if (!link)
@@ -16,7 +27,8 @@ static void drm_dp_link_reset(struct drm_dp_link *link)
        link->revision = 0;
        link->max_rate = 0;
        link->max_lanes = 0;
-       link->capabilities = 0;
+
+       drm_dp_link_caps_reset(&link->caps);
 
        link->rate = 0;
        link->lanes = 0;
@@ -49,7 +61,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
        link->max_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
 
        if (values[2] & DP_ENHANCED_FRAME_CAP)
-               link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
+               link->caps.enhanced_framing = true;
 
        link->rate = link->max_rate;
        link->lanes = link->max_lanes;
@@ -139,7 +151,7 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
        values[0] = drm_dp_link_rate_to_bw_code(link->rate);
        values[1] = link->lanes;
 
-       if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
+       if (link->caps.enhanced_framing)
                values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
 
        err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));

diff --git a/drivers/gpu/drm/tegra/dp.h b/drivers/gpu/drm/tegra/dp.h
index ec0342d4c95e166b6f1acbf2a6055e014c68dd1e..6246f9afb5fe74fa86f2da959e70c18e7546cafe 100644 (file)
--- a/drivers/gpu/drm/tegra/dp.h
+++ b/drivers/gpu/drm/tegra/dp.h
@@ -7,16 +7,31 @@
 #ifndef DRM_TEGRA_DP_H
 #define DRM_TEGRA_DP_H 1
 
+#include <linux/types.h>
+
 struct drm_dp_aux;
 
-#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)
+/**
+ * struct drm_dp_link_caps - DP link capabilities
+ */
+struct drm_dp_link_caps {
+       /**
+        * @enhanced_framing:
+        *
+        * enhanced framing capability (mandatory as of DP 1.2)
+        */
+       bool enhanced_framing;
+};
+
+void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
+                          const struct drm_dp_link_caps *src);
 
 /**
  * struct drm_dp_link - DP link capabilities and configuration
  * @revision: DP specification revision supported on the link
  * @max_rate: maximum clock rate supported on the link
  * @max_lanes: maximum number of lanes supported on the link
- * @capabilities: bitmask of capabilities supported on the link
+ * @caps: capabilities supported on the link (see &drm_dp_link_caps)
  * @rate: currently configured link rate
  * @lanes: currently configured number of lanes
  */
@@ -24,7 +39,8 @@ struct drm_dp_link {
        unsigned char revision;
        unsigned int max_rate;
        unsigned int max_lanes;
-       unsigned long capabilities;
+
+       struct drm_dp_link_caps caps;
 
        unsigned int rate;
        unsigned int lanes;

diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index dca71250d88c20e417441c82484e186cd3cbeada..dd118366455b36c9adcf986025aa727267bdf7c2 100644 (file)
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -977,7 +977,7 @@ static int tegra_sor_compute_config(struct tegra_sor *sor,
        num = ((mode->htotal - mode->hdisplay) - 7) * link_rate;
        config->hblank_symbols = div_u64(num, pclk);
 
-       if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
+       if (link->caps.enhanced_framing)
                config->hblank_symbols -= 3;
 
        config->hblank_symbols -= 12 / link->lanes;
@@ -1918,7 +1918,7 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
        value &= ~SOR_DP_LINKCTL_LANE_COUNT_MASK;
        value |= SOR_DP_LINKCTL_LANE_COUNT(lanes);
 
-       if (link.capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
+       if (link.caps.enhanced_framing)
                value |= SOR_DP_LINKCTL_ENHANCED_FRAME;
 
        tegra_sor_writel(sor, value, SOR_DP_LINKCTL0);