+++ /dev/null
-From 8ca5e0e4d6ed084d2321584e8cdc8105c60b9aa1 Mon Sep 17 00:00:00 2001
-From: FUKAUMI Naoki <naoki@radxa.com>
-Date: Tue, 25 Jun 2024 05:45:29 +0900
-Subject: [PATCH] rockchip: add support for Radxa ROCK Pi E v3.0
-
-ROCK Pi E v3.0 uses DDR4 SDRAM instead of DDR3 SDRAM used in v1.2x.
-
-prepare new rk3328-rock-pi-e-v3.dts in u-boot which just includes
-upstream rk3328-rock-pi-e.dts.
-
-defconfig still uses
- CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
-
-because v3.0 and prior are compatible.
-
-Suggested-by: Jonas Karlman <jonas@kwiboo.se>
-Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- ...dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} | 1 -
- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 47 +--------
- arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi | 4 +
- arch/arm/dts/rk3328-rock-pi-e-v3.dts | 4 +
- board/rockchip/evb_rk3328/MAINTAINERS | 4 +-
- configs/rock-pi-e-v3-rk3328_defconfig | 97 +++++++++++++++++++
- 6 files changed, 111 insertions(+), 46 deletions(-)
- copy arch/arm/dts/{rk3328-rock-pi-e-u-boot.dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} (94%)
- rewrite arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi (88%)
- create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
- create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3.dts
- create mode 100644 configs/rock-pi-e-v3-rk3328_defconfig
-
---- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
-+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
-@@ -1,43 +1,4 @@
- // SPDX-License-Identifier: GPL-2.0+
--/*
-- * (C) Copyright 2020 Radxa
-- */
-
--#include "rk3328-u-boot.dtsi"
-+#include "rk3328-rock-pi-e-base-u-boot.dtsi"
- #include "rk3328-sdram-ddr3-666.dtsi"
--
--/ {
-- smbios {
-- compatible = "u-boot,sysinfo-smbios";
--
-- smbios {
-- system {
-- manufacturer = "radxa";
-- product = "rock-pi-e_rk3328";
-- };
--
-- baseboard {
-- manufacturer = "radxa";
-- product = "rock-pi-e_rk3328";
-- };
--
-- chassis {
-- manufacturer = "radxa";
-- product = "rock-pi-e_rk3328";
-- };
-- };
-- };
--};
--
--&u2phy_host {
-- phy-supply = <&vcc_host_5v>;
--};
--
--&vcc_host_5v {
-- /delete-property/ regulator-always-on;
-- /delete-property/ regulator-boot-on;
--};
--
--&vcc_sd {
-- bootph-pre-ram;
--};
---- /dev/null
-+++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi
-@@ -0,0 +1,42 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2020 Radxa
-+ */
-+
-+#include "rk3328-u-boot.dtsi"
-+
-+/ {
-+ smbios {
-+ compatible = "u-boot,sysinfo-smbios";
-+
-+ smbios {
-+ system {
-+ manufacturer = "radxa";
-+ product = "rock-pi-e_rk3328";
-+ };
-+
-+ baseboard {
-+ manufacturer = "radxa";
-+ product = "rock-pi-e_rk3328";
-+ };
-+
-+ chassis {
-+ manufacturer = "radxa";
-+ product = "rock-pi-e_rk3328";
-+ };
-+ };
-+ };
-+};
-+
-+&u2phy_host {
-+ phy-supply = <&vcc_host_5v>;
-+};
-+
-+&vcc_host_5v {
-+ /delete-property/ regulator-always-on;
-+ /delete-property/ regulator-boot-on;
-+};
-+
-+&vcc_sd {
-+ bootph-pre-ram;
-+};
---- /dev/null
-+++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
-@@ -0,0 +1,4 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include "rk3328-rock-pi-e-base-u-boot.dtsi"
-+#include "rk3328-sdram-ddr4-666.dtsi"
---- /dev/null
-+++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts
-@@ -0,0 +1,4 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+/dts-v1/;
-+#include "rk3328-rock-pi-e.dts"
---- a/board/rockchip/evb_rk3328/MAINTAINERS
-+++ b/board/rockchip/evb_rk3328/MAINTAINERS
-@@ -64,5 +64,5 @@ M: Banglang Huang <banglang.huang@f
- R: Jonas Karlman <jonas@kwiboo.se>
- S: Maintained
- F: configs/rock-pi-e-rk3328_defconfig
--F: arch/arm/dts/rk3328-rock-pi-e.dts
--F: arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
-+F: configs/rock-pi-e-v3-rk3328_defconfig
-+F: arch/arm/dts/rk3328-rock-pi-e*
---- /dev/null
-+++ b/configs/rock-pi-e-v3-rk3328_defconfig
-@@ -0,0 +1,97 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_SPL_GPIO=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SF_DEFAULT_SPEED=20000000
-+CONFIG_ENV_OFFSET=0x3F8000
-+CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e-v3"
-+CONFIG_DM_RESET=y
-+CONFIG_ROCKCHIP_RK3328=y
-+CONFIG_DEBUG_UART_BASE=0xFF130000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SYS_LOAD_ADDR=0x800800
-+CONFIG_DEBUG_UART=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_FIT_SIGNATURE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_POWER=y
-+CONFIG_SPL_ATF=y
-+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-+CONFIG_CMD_BOOTZ=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_TIME=y
-+CONFIG_CMD_REGULATOR=y
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_TPL_OF_CONTROL=y
-+# CONFIG_OF_UPSTREAM is not set
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_TPL_OF_PLATDATA=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SYS_MMC_ENV_DEV=1
-+CONFIG_TPL_DM=y
-+CONFIG_SPL_DM_SEQ_ALIAS=y
-+CONFIG_REGMAP=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_TPL_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_TPL_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SPL_CLK=y
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_PHY_REALTEK=y
-+CONFIG_DM_MDIO=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_PHY_GIGE=y
-+CONFIG_ETH_DESIGNWARE=y
-+CONFIG_GMAC_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PINCTRL=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_DM_PMIC=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_SPL_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_SPL_DM_REGULATOR_FIXED=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_PWM_ROCKCHIP=y
-+CONFIG_RAM=y
-+CONFIG_SPL_RAM=y
-+CONFIG_TPL_RAM=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_SYSINFO=y
-+CONFIG_SYSINFO_SMBIOS=y
-+CONFIG_SYSRESET=y
-+# CONFIG_TPL_SYSRESET is not set
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_GENERIC=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_SPL_TINY_MEMSET=y
-+CONFIG_TPL_TINY_MEMSET=y
-+CONFIG_ERRNO_STR=y
--- /dev/null
+From 8ca5e0e4d6ed084d2321584e8cdc8105c60b9aa1 Mon Sep 17 00:00:00 2001
+From: FUKAUMI Naoki <naoki@radxa.com>
+Date: Tue, 25 Jun 2024 05:45:29 +0900
+Subject: [PATCH] rockchip: add support for Radxa ROCK Pi E v3.0
+
+ROCK Pi E v3.0 uses DDR4 SDRAM instead of DDR3 SDRAM used in v1.2x.
+
+prepare new rk3328-rock-pi-e-v3.dts in u-boot which just includes
+upstream rk3328-rock-pi-e.dts.
+
+defconfig still uses
+ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
+
+because v3.0 and prior are compatible.
+
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ ...dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} | 1 -
+ arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 47 +--------
+ arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi | 4 +
+ arch/arm/dts/rk3328-rock-pi-e-v3.dts | 4 +
+ board/rockchip/evb_rk3328/MAINTAINERS | 4 +-
+ configs/rock-pi-e-v3-rk3328_defconfig | 97 +++++++++++++++++++
+ 6 files changed, 111 insertions(+), 46 deletions(-)
+ copy arch/arm/dts/{rk3328-rock-pi-e-u-boot.dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} (94%)
+ rewrite arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi (88%)
+ create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3.dts
+ create mode 100644 configs/rock-pi-e-v3-rk3328_defconfig
+
+--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
++++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+@@ -1,43 +1,4 @@
+ // SPDX-License-Identifier: GPL-2.0+
+-/*
+- * (C) Copyright 2020 Radxa
+- */
+
+-#include "rk3328-u-boot.dtsi"
++#include "rk3328-rock-pi-e-base-u-boot.dtsi"
+ #include "rk3328-sdram-ddr3-666.dtsi"
+-
+-/ {
+- smbios {
+- compatible = "u-boot,sysinfo-smbios";
+-
+- smbios {
+- system {
+- manufacturer = "radxa";
+- product = "rock-pi-e_rk3328";
+- };
+-
+- baseboard {
+- manufacturer = "radxa";
+- product = "rock-pi-e_rk3328";
+- };
+-
+- chassis {
+- manufacturer = "radxa";
+- product = "rock-pi-e_rk3328";
+- };
+- };
+- };
+-};
+-
+-&u2phy_host {
+- phy-supply = <&vcc_host_5v>;
+-};
+-
+-&vcc_host_5v {
+- /delete-property/ regulator-always-on;
+- /delete-property/ regulator-boot-on;
+-};
+-
+-&vcc_sd {
+- bootph-pre-ram;
+-};
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi
+@@ -0,0 +1,42 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2020 Radxa
++ */
++
++#include "rk3328-u-boot.dtsi"
++
++/ {
++ smbios {
++ compatible = "u-boot,sysinfo-smbios";
++
++ smbios {
++ system {
++ manufacturer = "radxa";
++ product = "rock-pi-e_rk3328";
++ };
++
++ baseboard {
++ manufacturer = "radxa";
++ product = "rock-pi-e_rk3328";
++ };
++
++ chassis {
++ manufacturer = "radxa";
++ product = "rock-pi-e_rk3328";
++ };
++ };
++ };
++};
++
++&u2phy_host {
++ phy-supply = <&vcc_host_5v>;
++};
++
++&vcc_host_5v {
++ /delete-property/ regulator-always-on;
++ /delete-property/ regulator-boot-on;
++};
++
++&vcc_sd {
++ bootph-pre-ram;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
+@@ -0,0 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3328-rock-pi-e-base-u-boot.dtsi"
++#include "rk3328-sdram-ddr4-666.dtsi"
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts
+@@ -0,0 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include "rk3328-rock-pi-e.dts"
+--- a/board/rockchip/evb_rk3328/MAINTAINERS
++++ b/board/rockchip/evb_rk3328/MAINTAINERS
+@@ -64,5 +64,5 @@ M: Banglang Huang <banglang.huang@f
+ R: Jonas Karlman <jonas@kwiboo.se>
+ S: Maintained
+ F: configs/rock-pi-e-rk3328_defconfig
+-F: arch/arm/dts/rk3328-rock-pi-e.dts
+-F: arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
++F: configs/rock-pi-e-v3-rk3328_defconfig
++F: arch/arm/dts/rk3328-rock-pi-e*
+--- /dev/null
++++ b/configs/rock-pi-e-v3-rk3328_defconfig
+@@ -0,0 +1,97 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SPL_GPIO=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e-v3"
++CONFIG_DM_RESET=y
++CONFIG_ROCKCHIP_RK3328=y
++CONFIG_DEBUG_UART_BASE=0xFF130000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_TIME=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_TPL_OF_CONTROL=y
++# CONFIG_OF_UPSTREAM is not set
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_TPL_OF_PLATDATA=y
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SYS_MMC_ENV_DEV=1
++CONFIG_TPL_DM=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_REGMAP=y
++CONFIG_SPL_REGMAP=y
++CONFIG_TPL_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SPL_SYSCON=y
++CONFIG_TPL_SYSCON=y
++CONFIG_CLK=y
++CONFIG_SPL_CLK=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
++CONFIG_PHY_GIGE=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PINCTRL=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM=y
++CONFIG_SPL_RAM=y
++CONFIG_TPL_RAM=y
++CONFIG_DM_RNG=y
++CONFIG_RNG_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSINFO=y
++CONFIG_SYSINFO_SMBIOS=y
++CONFIG_SYSRESET=y
++# CONFIG_TPL_SYSRESET is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_TPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y
+++ /dev/null
-From e6e82ce24d4e9d20c232db2a95b2d10faf8f2bcf Mon Sep 17 00:00:00 2001
-From: Maxim Moskalets <maximmosk4@gmail.com>
-Date: Thu, 8 Aug 2024 22:37:10 +0300
-Subject: [PATCH] board: rockchip: add Radxa ROCK 3 Model C
-
-Based on rock-3a-rk3568_defconfig.
-Tested on v1.31 revision.
-
-Board Specifications:
-- Rockchip RK3566
-- 1/2/4GB LPDDR4 2112MT/s
-- eMMC socket
-- uSD card slot
-- M.2 2230 Connector
-- GbE LAN with POE
-- 3.5mm jack with mic
-- HDMI 2.0, MIPI DSI/CSI
-- USB 3.0 Host, USB 2.0 Host/OTG
-- 40-pin GPIO expansion ports
-
-Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
-Suggested-by: Jonas Karlman <jonas@kwiboo.se>
-Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
-Tested-by: FUKAUMI Naoki <naoki@radxa.com>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- arch/arm/dts/rk3566-rock-3c-u-boot.dtsi | 18 +++++
- board/rockchip/evb_rk3568/MAINTAINERS | 7 ++
- configs/rock-3c-rk3566_defconfig | 97 +++++++++++++++++++++++++
- doc/board/rockchip/rockchip.rst | 1 +
- 4 files changed, 123 insertions(+)
- create mode 100644 arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
- create mode 100644 configs/rock-3c-rk3566_defconfig
-
---- /dev/null
-+++ b/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
-@@ -0,0 +1,18 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+#include "rk356x-u-boot.dtsi"
-+
-+&sfc {
-+ flash@0 {
-+ bootph-pre-ram;
-+ bootph-some-ram;
-+ };
-+};
-+
-+/ {
-+ leds {
-+ led-0 {
-+ default-state = "on";
-+ };
-+ };
-+};
---- a/board/rockchip/evb_rk3568/MAINTAINERS
-+++ b/board/rockchip/evb_rk3568/MAINTAINERS
-@@ -69,3 +69,10 @@ S: Maintained
- F: configs/rock-3a-rk3568_defconfig
- F: arch/arm/dts/rk3568-rock-3a.dts
- F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
-+
-+ROCK-3C
-+M: Jonas Karlman <jonas@kwiboo.se>
-+M: Maxim Moskalets <maximmosk4@gmail.com>
-+S: Maintained
-+F: arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
-+F: configs/rock-3c-rk3566_defconfig
---- /dev/null
-+++ b/configs/rock-3c-rk3566_defconfig
-@@ -0,0 +1,97 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_SF_DEFAULT_SPEED=24000000
-+CONFIG_SF_DEFAULT_MODE=0x2000
-+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-rock-3c"
-+CONFIG_ROCKCHIP_RK3568=y
-+CONFIG_ROCKCHIP_SPI_IMAGE=y
-+CONFIG_SPL_SERIAL=y
-+CONFIG_DEBUG_UART_BASE=0xFE660000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SPL_SPI_FLASH_SUPPORT=y
-+CONFIG_SPL_SPI=y
-+CONFIG_SYS_LOAD_ADDR=0xc00800
-+CONFIG_PCI=y
-+CONFIG_DEBUG_UART=y
-+CONFIG_AHCI=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_FIT_SIGNATURE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-rock-3c.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_SPI_LOAD=y
-+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
-+CONFIG_SPL_ATF=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_PCI=y
-+CONFIG_CMD_POWEROFF=y
-+CONFIG_CMD_USB=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_PMIC=y
-+CONFIG_CMD_REGULATOR=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_OF_LIVE=y
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SPL_DM_SEQ_ALIAS=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SPL_CLK=y
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_LED=y
-+CONFIG_LED_GPIO=y
-+CONFIG_MISC=y
-+CONFIG_SUPPORT_EMMC_RPMB=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_SDMA=y
-+CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_SF_DEFAULT_BUS=4
-+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-+CONFIG_SPI_FLASH_GIGADEVICE=y
-+CONFIG_SPI_FLASH_MACRONIX=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+CONFIG_SPI_FLASH_XTX=y
-+CONFIG_PHY_REALTEK=y
-+CONFIG_DWC_ETH_QOS=y
-+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
-+CONFIG_NVME_PCI=y
-+CONFIG_PCIE_DW_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_DM_PMIC=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_SPL_RAM=y
-+CONFIG_SCSI=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_ROCKCHIP_SFC=y
-+CONFIG_SYSRESET=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_GENERIC=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_ERRNO_STR=y
---- a/doc/board/rockchip/rockchip.rst
-+++ b/doc/board/rockchip/rockchip.rst
-@@ -106,6 +106,7 @@ List of mainline supported Rockchip boar
- - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566)
- - Powkiddy X55 (powkiddy-x55-rk3566)
- - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
-+ - Radxa ROCK 3C (rock-3c-rk3566)
-
- * rk3568
- - Rockchip Evb-RK3568 (evb-rk3568)
--- /dev/null
+From e6e82ce24d4e9d20c232db2a95b2d10faf8f2bcf Mon Sep 17 00:00:00 2001
+From: Maxim Moskalets <maximmosk4@gmail.com>
+Date: Thu, 8 Aug 2024 22:37:10 +0300
+Subject: [PATCH] board: rockchip: add Radxa ROCK 3 Model C
+
+Based on rock-3a-rk3568_defconfig.
+Tested on v1.31 revision.
+
+Board Specifications:
+- Rockchip RK3566
+- 1/2/4GB LPDDR4 2112MT/s
+- eMMC socket
+- uSD card slot
+- M.2 2230 Connector
+- GbE LAN with POE
+- 3.5mm jack with mic
+- HDMI 2.0, MIPI DSI/CSI
+- USB 3.0 Host, USB 2.0 Host/OTG
+- 40-pin GPIO expansion ports
+
+Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
+Tested-by: FUKAUMI Naoki <naoki@radxa.com>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ arch/arm/dts/rk3566-rock-3c-u-boot.dtsi | 18 +++++
+ board/rockchip/evb_rk3568/MAINTAINERS | 7 ++
+ configs/rock-3c-rk3566_defconfig | 97 +++++++++++++++++++++++++
+ doc/board/rockchip/rockchip.rst | 1 +
+ 4 files changed, 123 insertions(+)
+ create mode 100644 arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
+ create mode 100644 configs/rock-3c-rk3566_defconfig
+
+--- /dev/null
++++ b/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
+@@ -0,0 +1,18 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++&sfc {
++ flash@0 {
++ bootph-pre-ram;
++ bootph-some-ram;
++ };
++};
++
++/ {
++ leds {
++ led-0 {
++ default-state = "on";
++ };
++ };
++};
+--- a/board/rockchip/evb_rk3568/MAINTAINERS
++++ b/board/rockchip/evb_rk3568/MAINTAINERS
+@@ -69,3 +69,10 @@ S: Maintained
+ F: configs/rock-3a-rk3568_defconfig
+ F: arch/arm/dts/rk3568-rock-3a.dts
+ F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
++
++ROCK-3C
++M: Jonas Karlman <jonas@kwiboo.se>
++M: Maxim Moskalets <maximmosk4@gmail.com>
++S: Maintained
++F: arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
++F: configs/rock-3c-rk3566_defconfig
+--- /dev/null
++++ b/configs/rock-3c-rk3566_defconfig
+@@ -0,0 +1,97 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=24000000
++CONFIG_SF_DEFAULT_MODE=0x2000
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-rock-3c"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_ROCKCHIP_SPI_IMAGE=y
++CONFIG_SPL_SERIAL=y
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI=y
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-rock-3c.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_SPI_LOAD=y
++CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_SPL_CLK=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_SF_DEFAULT_BUS=4
++CONFIG_SPI_FLASH_SFDP_SUPPORT=y
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_SPI_FLASH_XTX=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_NVME_PCI=y
++CONFIG_PCIE_DW_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_SPL_RAM=y
++CONFIG_SCSI=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_ROCKCHIP_SFC=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y
+--- a/doc/board/rockchip/rockchip.rst
++++ b/doc/board/rockchip/rockchip.rst
+@@ -106,6 +106,7 @@ List of mainline supported Rockchip boar
+ - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566)
+ - Powkiddy X55 (powkiddy-x55-rk3566)
+ - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
++ - Radxa ROCK 3C (rock-3c-rk3566)
+
+ * rk3568
+ - Rockchip Evb-RK3568 (evb-rk3568)
+++ /dev/null
-From 232af1e58a977f3857074d3aba3709c860bd8058 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Fri, 2 Aug 2024 22:12:22 +0000
-Subject: [PATCH] dm: adc: Add SPL_ADC Kconfig symbol for use of ADC in SPL
-
-What model of Radxa ZERO 3W/3E board can be identified using ADC at
-runtime, add a Kconfig symbol to allow use of ADC in SPL.
-
-This will be used to identify board model in SPL to allow loading
-correct FIT configuration and FDT for U-Boot proper at SPL phase.
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- drivers/Makefile | 2 +-
- drivers/adc/Kconfig | 5 +++++
- drivers/adc/Makefile | 2 +-
- 3 files changed, 7 insertions(+), 2 deletions(-)
-
---- a/drivers/Makefile
-+++ b/drivers/Makefile
-@@ -1,5 +1,6 @@
- # SPDX-License-Identifier: GPL-2.0+
-
-+obj-$(CONFIG_$(SPL_TPL_)ADC) += adc/
- obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/
- obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
- obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
-@@ -81,7 +82,6 @@ endif
-
- ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-
--obj-y += adc/
- obj-y += ata/
- obj-$(CONFIG_DM_DEMO) += demo/
- obj-y += block/
---- a/drivers/adc/Kconfig
-+++ b/drivers/adc/Kconfig
-@@ -1,5 +1,6 @@
- config ADC
- bool "Enable ADC drivers using Driver Model"
-+ depends on DM
- help
- This enables ADC API for drivers, which allows driving ADC features
- by single and multi-channel methods for:
-@@ -11,6 +12,10 @@ config ADC
- - support supply's phandle with auto-enable
- - supply polarity setting in fdt
-
-+config SPL_ADC
-+ bool "Enable ADC drivers using Driver Model in SPL"
-+ depends on SPL_DM
-+
- config ADC_EXYNOS
- bool "Enable Exynos 54xx ADC driver"
- depends on ADC
---- a/drivers/adc/Makefile
-+++ b/drivers/adc/Makefile
-@@ -4,7 +4,7 @@
- # Przemyslaw Marczak <p.marczak@samsung.com>
- #
-
--obj-$(CONFIG_ADC) += adc-uclass.o
-+obj-$(CONFIG_$(SPL_TPL_)ADC) += adc-uclass.o
- obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
- obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
- obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
--- /dev/null
+From 232af1e58a977f3857074d3aba3709c860bd8058 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Fri, 2 Aug 2024 22:12:22 +0000
+Subject: [PATCH] dm: adc: Add SPL_ADC Kconfig symbol for use of ADC in SPL
+
+What model of Radxa ZERO 3W/3E board can be identified using ADC at
+runtime, add a Kconfig symbol to allow use of ADC in SPL.
+
+This will be used to identify board model in SPL to allow loading
+correct FIT configuration and FDT for U-Boot proper at SPL phase.
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ drivers/Makefile | 2 +-
+ drivers/adc/Kconfig | 5 +++++
+ drivers/adc/Makefile | 2 +-
+ 3 files changed, 7 insertions(+), 2 deletions(-)
+
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0+
+
++obj-$(CONFIG_$(SPL_TPL_)ADC) += adc/
+ obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/
+ obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
+ obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
+@@ -81,7 +82,6 @@ endif
+
+ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+
+-obj-y += adc/
+ obj-y += ata/
+ obj-$(CONFIG_DM_DEMO) += demo/
+ obj-y += block/
+--- a/drivers/adc/Kconfig
++++ b/drivers/adc/Kconfig
+@@ -1,5 +1,6 @@
+ config ADC
+ bool "Enable ADC drivers using Driver Model"
++ depends on DM
+ help
+ This enables ADC API for drivers, which allows driving ADC features
+ by single and multi-channel methods for:
+@@ -11,6 +12,10 @@ config ADC
+ - support supply's phandle with auto-enable
+ - supply polarity setting in fdt
+
++config SPL_ADC
++ bool "Enable ADC drivers using Driver Model in SPL"
++ depends on SPL_DM
++
+ config ADC_EXYNOS
+ bool "Enable Exynos 54xx ADC driver"
+ depends on ADC
+--- a/drivers/adc/Makefile
++++ b/drivers/adc/Makefile
+@@ -4,7 +4,7 @@
+ # Przemyslaw Marczak <p.marczak@samsung.com>
+ #
+
+-obj-$(CONFIG_ADC) += adc-uclass.o
++obj-$(CONFIG_$(SPL_TPL_)ADC) += adc-uclass.o
+ obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
+ obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
+ obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
+++ /dev/null
-From 5d199ad9a6bb43dbf43efe45ec37002c4ae305a0 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Fri, 2 Aug 2024 22:12:23 +0000
-Subject: [PATCH] board: rockchip: Add Radxa ZERO 3W/3E
-
-The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
-computer based on the Rockchip RK3566, with a compact form factor and
-rich interfaces.
-
-Implement rk_board_late_init() to set correct fdtfile env var and
-board_fit_config_name_match() to load correct FIT config based on what
-board is detected at runtime so a single board target can be used for
-both board models.
-
-Features tested on a ZERO 3W 8GB v1.11:
-- SD-card boot
-- eMMC boot
-- USB gadget
-- USB host
-
-Features tested on a ZERO 3E 4GB v1.2:
-- SD-card boot
-- Ethernet
-- USB gadget
-- USB host
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
-Tested-by: FUKAUMI Naoki <naoki@radxa.com>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi | 15 ++++
- arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi | 15 ++++
- arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++
- board/radxa/zero3-rk3566/Kconfig | 12 +++
- board/radxa/zero3-rk3566/MAINTAINERS | 6 ++
- board/radxa/zero3-rk3566/Makefile | 3 +
- board/radxa/zero3-rk3566/zero3-rk3566.c | 59 +++++++++++++
- configs/radxa-zero-3-rk3566_defconfig | 85 +++++++++++++++++++
- doc/board/rockchip/rockchip.rst | 1 +
- 9 files changed, 202 insertions(+)
- create mode 100644 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
- create mode 100644 arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
- create mode 100644 board/radxa/zero3-rk3566/Kconfig
- create mode 100644 board/radxa/zero3-rk3566/MAINTAINERS
- create mode 100644 board/radxa/zero3-rk3566/Makefile
- create mode 100644 board/radxa/zero3-rk3566/zero3-rk3566.c
- create mode 100644 configs/radxa-zero-3-rk3566_defconfig
-
---- /dev/null
-+++ b/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
-@@ -0,0 +1,15 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+#include "rk356x-u-boot.dtsi"
-+
-+&saradc {
-+ bootph-pre-ram;
-+};
-+
-+&usb_host0_xhci {
-+ dr_mode = "otg";
-+};
-+
-+&vcca_1v8 {
-+ bootph-pre-ram;
-+};
---- /dev/null
-+++ b/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
-@@ -0,0 +1,15 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+#include "rk356x-u-boot.dtsi"
-+
-+&saradc {
-+ bootph-pre-ram;
-+};
-+
-+&usb_host0_xhci {
-+ dr_mode = "otg";
-+};
-+
-+&vcca_1v8 {
-+ bootph-pre-ram;
-+};
---- a/arch/arm/mach-rockchip/rk3568/Kconfig
-+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
-@@ -32,6 +32,11 @@ config TARGET_QUARTZ64_RK3566
- help
- Pine64 Quartz64 single board computer with a RK3566 SoC.
-
-+config TARGET_RADXA_ZERO_3_RK3566
-+ bool "Radxa ZERO 3W/3E"
-+ help
-+ Radxa ZERO 3W/3E single board computers with a RK3566 SoC.
-+
- endchoice
-
- config ROCKCHIP_BOOT_MODE_REG
-@@ -54,5 +59,6 @@ source "board/anbernic/rgxx3_rk3566/Kcon
- source "board/hardkernel/odroid_m1/Kconfig"
- source "board/pine64/quartz64_rk3566/Kconfig"
- source "board/powkiddy/x55/Kconfig"
-+source "board/radxa/zero3-rk3566/Kconfig"
-
- endif
---- /dev/null
-+++ b/board/radxa/zero3-rk3566/Kconfig
-@@ -0,0 +1,12 @@
-+if TARGET_RADXA_ZERO_3_RK3566
-+
-+config SYS_BOARD
-+ default "zero3-rk3566"
-+
-+config SYS_VENDOR
-+ default "radxa"
-+
-+config SYS_CONFIG_NAME
-+ default "evb_rk3568"
-+
-+endif
---- /dev/null
-+++ b/board/radxa/zero3-rk3566/MAINTAINERS
-@@ -0,0 +1,6 @@
-+RADXA-ZERO-3-RK3566
-+M: Jonas Karlman <jonas@kwiboo.se>
-+S: Maintained
-+F: board/radxa/zero3-rk3566
-+F: configs/radxa-zero-3-rk3566_defconfig
-+F: arch/arm/dts/rk3566-radxa-zero-3*
---- /dev/null
-+++ b/board/radxa/zero3-rk3566/Makefile
-@@ -0,0 +1,3 @@
-+# SPDX-License-Identifier: GPL-2.0+
-+
-+obj-y += zero3-rk3566.o
---- /dev/null
-+++ b/board/radxa/zero3-rk3566/zero3-rk3566.c
-@@ -0,0 +1,59 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include <linux/errno.h>
-+#include <linux/kernel.h>
-+#include <adc.h>
-+#include <env.h>
-+
-+#define HW_ID_CHANNEL 1
-+
-+struct board_model {
-+ unsigned int low;
-+ unsigned int high;
-+ const char *fdtfile;
-+};
-+
-+static const struct board_model board_models[] = {
-+ { 230, 270, "rockchip/rk3566-radxa-zero-3w.dtb" },
-+ { 400, 450, "rockchip/rk3566-radxa-zero-3e.dtb" },
-+};
-+
-+static const struct board_model *get_board_model(void)
-+{
-+ unsigned int val;
-+ int i, ret;
-+
-+ ret = adc_channel_single_shot("saradc@fe720000", HW_ID_CHANNEL, &val);
-+ if (ret)
-+ return NULL;
-+
-+ for (i = 0; i < ARRAY_SIZE(board_models); i++) {
-+ unsigned int min = board_models[i].low;
-+ unsigned int max = board_models[i].high;
-+
-+ if (min <= val && val <= max)
-+ return &board_models[i];
-+ }
-+
-+ return NULL;
-+}
-+
-+int rk_board_late_init(void)
-+{
-+ const struct board_model *model = get_board_model();
-+
-+ if (model)
-+ env_set("fdtfile", model->fdtfile);
-+
-+ return 0;
-+}
-+
-+int board_fit_config_name_match(const char *name)
-+{
-+ const struct board_model *model = get_board_model();
-+
-+ if (model && !strcmp(name, model->fdtfile))
-+ return 0;
-+
-+ return -EINVAL;
-+}
---- /dev/null
-+++ b/configs/radxa-zero-3-rk3566_defconfig
-@@ -0,0 +1,85 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_SPL_GPIO=y
-+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-zero-3w"
-+CONFIG_ROCKCHIP_RK3568=y
-+CONFIG_SPL_SERIAL=y
-+CONFIG_TARGET_RADXA_ZERO_3_RK3566=y
-+CONFIG_DEBUG_UART_BASE=0xFE660000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SYS_LOAD_ADDR=0xc00800
-+CONFIG_DEBUG_UART=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_FIT_SIGNATURE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-zero-3w.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_POWER=y
-+CONFIG_SPL_ATF=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_ROCKUSB=y
-+CONFIG_CMD_USB_MASS_STORAGE=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_PMIC=y
-+CONFIG_CMD_REGULATOR=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_OF_LIVE=y
-+CONFIG_OF_LIST="rockchip/rk3566-radxa-zero-3w rockchip/rk3566-radxa-zero-3e"
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SPL_DM_SEQ_ALIAS=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_SPL_ADC=y
-+CONFIG_SPL_CLK=y
-+# CONFIG_USB_FUNCTION_FASTBOOT is not set
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_LED=y
-+CONFIG_LED_GPIO=y
-+CONFIG_MISC=y
-+CONFIG_SUPPORT_EMMC_RPMB=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_SDMA=y
-+CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_PHY_REALTEK=y
-+CONFIG_DWC_ETH_QOS=y
-+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_DM_PMIC=y
-+CONFIG_DM_PMIC_FAN53555=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_SPL_DM_REGULATOR=y
-+CONFIG_SPL_DM_REGULATOR_FIXED=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_SPL_RAM=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_SYSRESET=y
-+CONFIG_SYSRESET_PSCI=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_DOWNLOAD=y
-+CONFIG_USB_FUNCTION_ROCKUSB=y
-+CONFIG_ERRNO_STR=y
---- a/doc/board/rockchip/rockchip.rst
-+++ b/doc/board/rockchip/rockchip.rst
-@@ -107,6 +107,7 @@ List of mainline supported Rockchip boar
- - Powkiddy X55 (powkiddy-x55-rk3566)
- - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
- - Radxa ROCK 3C (rock-3c-rk3566)
-+ - Radxa ZERO 3W/3E (radxa-zero-3-rk3566)
-
- * rk3568
- - Rockchip Evb-RK3568 (evb-rk3568)
--- /dev/null
+From 5d199ad9a6bb43dbf43efe45ec37002c4ae305a0 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Fri, 2 Aug 2024 22:12:23 +0000
+Subject: [PATCH] board: rockchip: Add Radxa ZERO 3W/3E
+
+The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
+computer based on the Rockchip RK3566, with a compact form factor and
+rich interfaces.
+
+Implement rk_board_late_init() to set correct fdtfile env var and
+board_fit_config_name_match() to load correct FIT config based on what
+board is detected at runtime so a single board target can be used for
+both board models.
+
+Features tested on a ZERO 3W 8GB v1.11:
+- SD-card boot
+- eMMC boot
+- USB gadget
+- USB host
+
+Features tested on a ZERO 3E 4GB v1.2:
+- SD-card boot
+- Ethernet
+- USB gadget
+- USB host
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Tested-by: FUKAUMI Naoki <naoki@radxa.com>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi | 15 ++++
+ arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi | 15 ++++
+ arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++
+ board/radxa/zero3-rk3566/Kconfig | 12 +++
+ board/radxa/zero3-rk3566/MAINTAINERS | 6 ++
+ board/radxa/zero3-rk3566/Makefile | 3 +
+ board/radxa/zero3-rk3566/zero3-rk3566.c | 59 +++++++++++++
+ configs/radxa-zero-3-rk3566_defconfig | 85 +++++++++++++++++++
+ doc/board/rockchip/rockchip.rst | 1 +
+ 9 files changed, 202 insertions(+)
+ create mode 100644 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
+ create mode 100644 board/radxa/zero3-rk3566/Kconfig
+ create mode 100644 board/radxa/zero3-rk3566/MAINTAINERS
+ create mode 100644 board/radxa/zero3-rk3566/Makefile
+ create mode 100644 board/radxa/zero3-rk3566/zero3-rk3566.c
+ create mode 100644 configs/radxa-zero-3-rk3566_defconfig
+
+--- /dev/null
++++ b/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
+@@ -0,0 +1,15 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++&saradc {
++ bootph-pre-ram;
++};
++
++&usb_host0_xhci {
++ dr_mode = "otg";
++};
++
++&vcca_1v8 {
++ bootph-pre-ram;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
+@@ -0,0 +1,15 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++&saradc {
++ bootph-pre-ram;
++};
++
++&usb_host0_xhci {
++ dr_mode = "otg";
++};
++
++&vcca_1v8 {
++ bootph-pre-ram;
++};
+--- a/arch/arm/mach-rockchip/rk3568/Kconfig
++++ b/arch/arm/mach-rockchip/rk3568/Kconfig
+@@ -32,6 +32,11 @@ config TARGET_QUARTZ64_RK3566
+ help
+ Pine64 Quartz64 single board computer with a RK3566 SoC.
+
++config TARGET_RADXA_ZERO_3_RK3566
++ bool "Radxa ZERO 3W/3E"
++ help
++ Radxa ZERO 3W/3E single board computers with a RK3566 SoC.
++
+ endchoice
+
+ config ROCKCHIP_BOOT_MODE_REG
+@@ -54,5 +59,6 @@ source "board/anbernic/rgxx3_rk3566/Kcon
+ source "board/hardkernel/odroid_m1/Kconfig"
+ source "board/pine64/quartz64_rk3566/Kconfig"
+ source "board/powkiddy/x55/Kconfig"
++source "board/radxa/zero3-rk3566/Kconfig"
+
+ endif
+--- /dev/null
++++ b/board/radxa/zero3-rk3566/Kconfig
+@@ -0,0 +1,12 @@
++if TARGET_RADXA_ZERO_3_RK3566
++
++config SYS_BOARD
++ default "zero3-rk3566"
++
++config SYS_VENDOR
++ default "radxa"
++
++config SYS_CONFIG_NAME
++ default "evb_rk3568"
++
++endif
+--- /dev/null
++++ b/board/radxa/zero3-rk3566/MAINTAINERS
+@@ -0,0 +1,6 @@
++RADXA-ZERO-3-RK3566
++M: Jonas Karlman <jonas@kwiboo.se>
++S: Maintained
++F: board/radxa/zero3-rk3566
++F: configs/radxa-zero-3-rk3566_defconfig
++F: arch/arm/dts/rk3566-radxa-zero-3*
+--- /dev/null
++++ b/board/radxa/zero3-rk3566/Makefile
+@@ -0,0 +1,3 @@
++# SPDX-License-Identifier: GPL-2.0+
++
++obj-y += zero3-rk3566.o
+--- /dev/null
++++ b/board/radxa/zero3-rk3566/zero3-rk3566.c
+@@ -0,0 +1,59 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include <linux/errno.h>
++#include <linux/kernel.h>
++#include <adc.h>
++#include <env.h>
++
++#define HW_ID_CHANNEL 1
++
++struct board_model {
++ unsigned int low;
++ unsigned int high;
++ const char *fdtfile;
++};
++
++static const struct board_model board_models[] = {
++ { 230, 270, "rockchip/rk3566-radxa-zero-3w.dtb" },
++ { 400, 450, "rockchip/rk3566-radxa-zero-3e.dtb" },
++};
++
++static const struct board_model *get_board_model(void)
++{
++ unsigned int val;
++ int i, ret;
++
++ ret = adc_channel_single_shot("saradc@fe720000", HW_ID_CHANNEL, &val);
++ if (ret)
++ return NULL;
++
++ for (i = 0; i < ARRAY_SIZE(board_models); i++) {
++ unsigned int min = board_models[i].low;
++ unsigned int max = board_models[i].high;
++
++ if (min <= val && val <= max)
++ return &board_models[i];
++ }
++
++ return NULL;
++}
++
++int rk_board_late_init(void)
++{
++ const struct board_model *model = get_board_model();
++
++ if (model)
++ env_set("fdtfile", model->fdtfile);
++
++ return 0;
++}
++
++int board_fit_config_name_match(const char *name)
++{
++ const struct board_model *model = get_board_model();
++
++ if (model && !strcmp(name, model->fdtfile))
++ return 0;
++
++ return -EINVAL;
++}
+--- /dev/null
++++ b/configs/radxa-zero-3-rk3566_defconfig
+@@ -0,0 +1,85 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SPL_GPIO=y
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-zero-3w"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_SERIAL=y
++CONFIG_TARGET_RADXA_ZERO_3_RK3566=y
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-zero-3w.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_ROCKUSB=y
++CONFIG_CMD_USB_MASS_STORAGE=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_OF_LIST="rockchip/rk3566-radxa-zero-3w rockchip/rk3566-radxa-zero-3e"
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_CLK=y
++# CONFIG_USB_FUNCTION_FASTBOOT is not set
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_DM_PMIC_FAN53555=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_SYSRESET_PSCI=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_ROCKUSB=y
++CONFIG_ERRNO_STR=y
+--- a/doc/board/rockchip/rockchip.rst
++++ b/doc/board/rockchip/rockchip.rst
+@@ -107,6 +107,7 @@ List of mainline supported Rockchip boar
+ - Powkiddy X55 (powkiddy-x55-rk3566)
+ - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
+ - Radxa ROCK 3C (rock-3c-rk3566)
++ - Radxa ZERO 3W/3E (radxa-zero-3-rk3566)
+
+ * rk3568
+ - Rockchip Evb-RK3568 (evb-rk3568)
+++ /dev/null
-From e20d57ae7e0c28f2d770a7d18c1501d332e8766a Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Wed, 31 Jul 2024 07:28:54 +0000
-Subject: [PATCH] board: rockchip: Add Radxa ROCK 3B
-
-The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
-factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
-version based on the RK3568 SoC and an industrial version based on the
-RK3568J SoC.
-
-Features tested on ROCK 3B 8GB v1.51 (both variants):
-- SD-card boot
-- eMMC boot
-- SPI Flash boot
-- Ethernet
-- PCIe/NVMe
-- USB gadget
-- USB host
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
-Tested-by: FUKAUMI Naoki <naoki@radxa.com>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- arch/arm/dts/rk3568-rock-3b-u-boot.dtsi | 15 ++++
- board/rockchip/evb_rk3568/MAINTAINERS | 6 ++
- configs/rock-3b-rk3568_defconfig | 100 ++++++++++++++++++++++++
- doc/board/rockchip/rockchip.rst | 3 +-
- 4 files changed, 123 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/dts/rk3568-rock-3b-u-boot.dtsi
- create mode 100644 configs/rock-3b-rk3568_defconfig
-
---- /dev/null
-+++ b/arch/arm/dts/rk3568-rock-3b-u-boot.dtsi
-@@ -0,0 +1,15 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+#include "rk356x-u-boot.dtsi"
-+
-+&sdhci {
-+ mmc-hs400-1_8v;
-+ mmc-hs400-enhanced-strobe;
-+};
-+
-+&sfc {
-+ flash@0 {
-+ bootph-pre-ram;
-+ bootph-some-ram;
-+ };
-+};
---- a/board/rockchip/evb_rk3568/MAINTAINERS
-+++ b/board/rockchip/evb_rk3568/MAINTAINERS
-@@ -70,6 +70,12 @@ F: configs/rock-3a-rk3568_defconfig
- F: arch/arm/dts/rk3568-rock-3a.dts
- F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
-
-+ROCK-3B
-+M: Jonas Karlman <jonas@kwiboo.se>
-+S: Maintained
-+F: configs/rock-3b-rk3568_defconfig
-+F: arch/arm/dts/rk3568-rock-3b*
-+
- ROCK-3C
- M: Jonas Karlman <jonas@kwiboo.se>
- M: Maxim Moskalets <maximmosk4@gmail.com>
---- /dev/null
-+++ b/configs/rock-3b-rk3568_defconfig
-@@ -0,0 +1,100 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_SF_DEFAULT_SPEED=24000000
-+CONFIG_SF_DEFAULT_MODE=0x2000
-+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-rock-3b"
-+CONFIG_ROCKCHIP_RK3568=y
-+CONFIG_ROCKCHIP_SPI_IMAGE=y
-+CONFIG_SPL_SERIAL=y
-+CONFIG_DEBUG_UART_BASE=0xFE660000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SPL_SPI_FLASH_SUPPORT=y
-+CONFIG_SPL_SPI=y
-+CONFIG_SYS_LOAD_ADDR=0xc00800
-+CONFIG_PCI=y
-+CONFIG_DEBUG_UART=y
-+CONFIG_AHCI=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_FIT_SIGNATURE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-rock-3b.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_SPI_LOAD=y
-+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
-+CONFIG_SPL_ATF=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_PCI=y
-+CONFIG_CMD_POWEROFF=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_ROCKUSB=y
-+CONFIG_CMD_USB_MASS_STORAGE=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_PMIC=y
-+CONFIG_CMD_REGULATOR=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_OF_LIVE=y
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SPL_DM_SEQ_ALIAS=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SPL_CLK=y
-+# CONFIG_USB_FUNCTION_FASTBOOT is not set
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_LED=y
-+CONFIG_LED_GPIO=y
-+CONFIG_MISC=y
-+CONFIG_SUPPORT_EMMC_RPMB=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_SDMA=y
-+CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_SF_DEFAULT_BUS=4
-+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-+CONFIG_SPI_FLASH_MACRONIX=y
-+CONFIG_SPI_FLASH_XTX=y
-+CONFIG_PHY_REALTEK=y
-+CONFIG_DWC_ETH_QOS=y
-+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
-+CONFIG_NVME_PCI=y
-+CONFIG_PCIE_DW_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_DM_PMIC=y
-+CONFIG_DM_PMIC_FAN53555=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_SPL_RAM=y
-+CONFIG_SCSI=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_ROCKCHIP_SFC=y
-+CONFIG_SYSRESET=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_DOWNLOAD=y
-+CONFIG_USB_FUNCTION_ROCKUSB=y
-+CONFIG_ERRNO_STR=y
---- a/doc/board/rockchip/rockchip.rst
-+++ b/doc/board/rockchip/rockchip.rst
-@@ -118,7 +118,8 @@ List of mainline supported Rockchip boar
- - Generic RK3566/RK3568 (generic-rk3568)
- - Hardkernel ODROID-M1 (odroid-m1-rk3568)
- - Radxa E25 Carrier Board (radxa-e25-rk3568)
-- - Radxa ROCK 3 Model A (rock-3a-rk3568)
-+ - Radxa ROCK 3A (rock-3a-rk3568)
-+ - Radxa ROCK 3B (rock-3b-rk3568)
-
- * rk3588
- - Rockchip EVB (evb-rk3588)
--- /dev/null
+From e20d57ae7e0c28f2d770a7d18c1501d332e8766a Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Wed, 31 Jul 2024 07:28:54 +0000
+Subject: [PATCH] board: rockchip: Add Radxa ROCK 3B
+
+The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
+factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
+version based on the RK3568 SoC and an industrial version based on the
+RK3568J SoC.
+
+Features tested on ROCK 3B 8GB v1.51 (both variants):
+- SD-card boot
+- eMMC boot
+- SPI Flash boot
+- Ethernet
+- PCIe/NVMe
+- USB gadget
+- USB host
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Tested-by: FUKAUMI Naoki <naoki@radxa.com>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ arch/arm/dts/rk3568-rock-3b-u-boot.dtsi | 15 ++++
+ board/rockchip/evb_rk3568/MAINTAINERS | 6 ++
+ configs/rock-3b-rk3568_defconfig | 100 ++++++++++++++++++++++++
+ doc/board/rockchip/rockchip.rst | 3 +-
+ 4 files changed, 123 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/dts/rk3568-rock-3b-u-boot.dtsi
+ create mode 100644 configs/rock-3b-rk3568_defconfig
+
+--- /dev/null
++++ b/arch/arm/dts/rk3568-rock-3b-u-boot.dtsi
+@@ -0,0 +1,15 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++&sdhci {
++ mmc-hs400-1_8v;
++ mmc-hs400-enhanced-strobe;
++};
++
++&sfc {
++ flash@0 {
++ bootph-pre-ram;
++ bootph-some-ram;
++ };
++};
+--- a/board/rockchip/evb_rk3568/MAINTAINERS
++++ b/board/rockchip/evb_rk3568/MAINTAINERS
+@@ -70,6 +70,12 @@ F: configs/rock-3a-rk3568_defconfig
+ F: arch/arm/dts/rk3568-rock-3a.dts
+ F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+
++ROCK-3B
++M: Jonas Karlman <jonas@kwiboo.se>
++S: Maintained
++F: configs/rock-3b-rk3568_defconfig
++F: arch/arm/dts/rk3568-rock-3b*
++
+ ROCK-3C
+ M: Jonas Karlman <jonas@kwiboo.se>
+ M: Maxim Moskalets <maximmosk4@gmail.com>
+--- /dev/null
++++ b/configs/rock-3b-rk3568_defconfig
+@@ -0,0 +1,100 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=24000000
++CONFIG_SF_DEFAULT_MODE=0x2000
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-rock-3b"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_ROCKCHIP_SPI_IMAGE=y
++CONFIG_SPL_SERIAL=y
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI=y
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-rock-3b.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_SPI_LOAD=y
++CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_ROCKUSB=y
++CONFIG_CMD_USB_MASS_STORAGE=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_SPL_CLK=y
++# CONFIG_USB_FUNCTION_FASTBOOT is not set
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_SF_DEFAULT_BUS=4
++CONFIG_SPI_FLASH_SFDP_SUPPORT=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_XTX=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_NVME_PCI=y
++CONFIG_PCIE_DW_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_DM_PMIC_FAN53555=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_SPL_RAM=y
++CONFIG_SCSI=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_ROCKCHIP_SFC=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_ROCKUSB=y
++CONFIG_ERRNO_STR=y
+--- a/doc/board/rockchip/rockchip.rst
++++ b/doc/board/rockchip/rockchip.rst
+@@ -118,7 +118,8 @@ List of mainline supported Rockchip boar
+ - Generic RK3566/RK3568 (generic-rk3568)
+ - Hardkernel ODROID-M1 (odroid-m1-rk3568)
+ - Radxa E25 Carrier Board (radxa-e25-rk3568)
+- - Radxa ROCK 3 Model A (rock-3a-rk3568)
++ - Radxa ROCK 3A (rock-3a-rk3568)
++ - Radxa ROCK 3B (rock-3b-rk3568)
+
+ * rk3588
+ - Rockchip EVB (evb-rk3588)
+++ /dev/null
-From 626a479873b6a680b3227c4852bde4a1f2c17fdf Mon Sep 17 00:00:00 2001
-From: Chukun Pan <amadeus@jmu.edu.cn>
-Date: Fri, 19 Apr 2024 18:30:19 +0800
-Subject: [PATCH 1/3] arm64: dts: rockchip: correct the model name for Radxa
- ROCK 3A
-
-According to https://radxa.com/products/rock3/3a,
-the name of this board should be "Radxa ROCK 3A".
-
-Suggested-by: FUKAUMI Naoki <naoki@radxa.com>
-Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
-Reviewed-by: Dragan Simic <dsimic@manjaro.org>
-Link: https://lore.kernel.org/r/20240419103019.992586-3-amadeus@jmu.edu.cn
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/dts/upstream/src/arm64/rockchip/rk3568-rock-3a.dts
-+++ b/dts/upstream/src/arm64/rockchip/rk3568-rock-3a.dts
-@@ -8,7 +8,7 @@
- #include "rk3568.dtsi"
-
- / {
-- model = "Radxa ROCK3 Model A";
-+ model = "Radxa ROCK 3A";
- compatible = "radxa,rock3a", "rockchip,rk3568";
-
- aliases {
--- /dev/null
+From 626a479873b6a680b3227c4852bde4a1f2c17fdf Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Fri, 19 Apr 2024 18:30:19 +0800
+Subject: [PATCH 1/3] arm64: dts: rockchip: correct the model name for Radxa
+ ROCK 3A
+
+According to https://radxa.com/products/rock3/3a,
+the name of this board should be "Radxa ROCK 3A".
+
+Suggested-by: FUKAUMI Naoki <naoki@radxa.com>
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Reviewed-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/20240419103019.992586-3-amadeus@jmu.edu.cn
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/dts/upstream/src/arm64/rockchip/rk3568-rock-3a.dts
++++ b/dts/upstream/src/arm64/rockchip/rk3568-rock-3a.dts
+@@ -8,7 +8,7 @@
+ #include "rk3568.dtsi"
+
+ / {
+- model = "Radxa ROCK3 Model A";
++ model = "Radxa ROCK 3A";
+ compatible = "radxa,rock3a", "rockchip,rk3568";
+
+ aliases {
+++ /dev/null
-From 45e831033f7a00a14f64afa1e34c476a9ff0f9f0 Mon Sep 17 00:00:00 2001
-From: Dragan Simic <dsimic@manjaro.org>
-Date: Thu, 18 Apr 2024 18:26:20 +0200
-Subject: [PATCH] arm64: dts: rockchip: Correct the model names for Radxa ROCK
- 5 boards
-
-Correct the descriptions of a few Radxa boards, according to the up-to-date
-documentation from Radxa and the detailed explanation from Naoki. [1] To sum
-it up, the short naming, as specified by Radxa, is preferred.
-
-[1] https://lore.kernel.org/linux-rockchip/B26C732A4DCEA9B3+282b8775-601b-4d4a-a513-4924b7940076@radxa.com/
-
-Suggested-by: FUKAUMI Naoki <naoki@radxa.com>
-Signed-off-by: Dragan Simic <dsimic@manjaro.org>
-Link: https://lore.kernel.org/r/6931289a252dc2d6c7bfd2388835c5e98ba0d8c9.1713457260.git.dsimic@manjaro.org
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 +-
- arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/dts/upstream/src/arm64/rockchip/rk3588-rock-5b.dts
-+++ b/dts/upstream/src/arm64/rockchip/rk3588-rock-5b.dts
-@@ -7,7 +7,7 @@
- #include "rk3588.dtsi"
-
- / {
-- model = "Radxa ROCK 5 Model B";
-+ model = "Radxa ROCK 5B";
- compatible = "radxa,rock-5b", "rockchip,rk3588";
-
- aliases {
---- a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
-+++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
-@@ -8,7 +8,7 @@
- #include "rk3588s.dtsi"
-
- / {
-- model = "Radxa ROCK 5 Model A";
-+ model = "Radxa ROCK 5A";
- compatible = "radxa,rock-5a", "rockchip,rk3588s";
-
- aliases {
--- /dev/null
+From 45e831033f7a00a14f64afa1e34c476a9ff0f9f0 Mon Sep 17 00:00:00 2001
+From: Dragan Simic <dsimic@manjaro.org>
+Date: Thu, 18 Apr 2024 18:26:20 +0200
+Subject: [PATCH] arm64: dts: rockchip: Correct the model names for Radxa ROCK
+ 5 boards
+
+Correct the descriptions of a few Radxa boards, according to the up-to-date
+documentation from Radxa and the detailed explanation from Naoki. [1] To sum
+it up, the short naming, as specified by Radxa, is preferred.
+
+[1] https://lore.kernel.org/linux-rockchip/B26C732A4DCEA9B3+282b8775-601b-4d4a-a513-4924b7940076@radxa.com/
+
+Suggested-by: FUKAUMI Naoki <naoki@radxa.com>
+Signed-off-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/6931289a252dc2d6c7bfd2388835c5e98ba0d8c9.1713457260.git.dsimic@manjaro.org
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 +-
+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/dts/upstream/src/arm64/rockchip/rk3588-rock-5b.dts
++++ b/dts/upstream/src/arm64/rockchip/rk3588-rock-5b.dts
+@@ -7,7 +7,7 @@
+ #include "rk3588.dtsi"
+
+ / {
+- model = "Radxa ROCK 5 Model B";
++ model = "Radxa ROCK 5B";
+ compatible = "radxa,rock-5b", "rockchip,rk3588";
+
+ aliases {
+--- a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
++++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts
+@@ -8,7 +8,7 @@
+ #include "rk3588s.dtsi"
+
+ / {
+- model = "Radxa ROCK 5 Model A";
++ model = "Radxa ROCK 5A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+++ /dev/null
-From 7db9ff164813afb343024d37731ab797ed7f507e Mon Sep 17 00:00:00 2001
-From: Sebastian Kropatsch <seb-dev@mail.de>
-Date: Thu, 11 Jul 2024 12:15:18 +0200
-Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6S
-
-The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
-It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
-one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
-Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
-connector, a fan connector, IR receiver as well as some buttons and LEDs.
-
-Add initial support for this board using the upstream devicetree sources.
-
-Kernel commit:
-f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
-
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
----
- arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi | 3 +
- arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++
- board/friendlyelec/nanopi-r6s-rk3588s/Kconfig | 12 +++
- .../nanopi-r6s-rk3588s/MAINTAINERS | 7 ++
- configs/nanopi-r6s-rk3588s_defconfig | 82 +++++++++++++++++++
- doc/board/rockchip/rockchip.rst | 1 +
- include/configs/nanopi-r6s-rk3588s.h | 12 +++
- 7 files changed, 130 insertions(+)
- create mode 100644 arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
- create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
- create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
- create mode 100644 configs/nanopi-r6s-rk3588s_defconfig
- create mode 100644 include/configs/nanopi-r6s-rk3588s.h
-
---- /dev/null
-+++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
-@@ -0,0 +1,3 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+#include "rk3588s-u-boot.dtsi"
---- a/arch/arm/mach-rockchip/rk3588/Kconfig
-+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
-@@ -78,6 +78,18 @@ config TARGET_NANOPCT6_RK3588
- Power: 5.5*2.1mm DC Jack, 12VDC input
- Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
-
-+config TARGET_NANOPI_R6S_RK3588S
-+ bool "FriendlyElec NanoPi R6S"
-+ select BOARD_LATE_INIT
-+ help
-+ The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip
-+ RK3588s.
-+ It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC
-+ storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports,
-+ one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a
-+ 12-pin GPIO FPC connector, a fan connector, IR receiver as well
-+ as some buttons and LEDs.
-+
- config TARGET_NOVA_RK3588
- bool "Indiedroid Nova RK3588"
- select BOARD_LATE_INIT
-@@ -232,6 +244,7 @@ config TEXT_BASE
-
- source "board/edgeble/neural-compute-module-6/Kconfig"
- source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
-+source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig"
- source "board/indiedroid/nova/Kconfig"
- source "board/pine64/quartzpro64-rk3588/Kconfig"
- source "board/turing/turing-rk1-rk3588/Kconfig"
---- /dev/null
-+++ b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
-@@ -0,0 +1,12 @@
-+if TARGET_NANOPI_R6S_RK3588S
-+
-+config SYS_BOARD
-+ default "nanopi-r6s-rk3588s"
-+
-+config SYS_VENDOR
-+ default "friendlyelec"
-+
-+config SYS_CONFIG_NAME
-+ default "nanopi-r6s-rk3588s"
-+
-+endif
---- /dev/null
-+++ b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
-@@ -0,0 +1,7 @@
-+NANOPI-R6S
-+M: Sebastian Kropatsch <seb-dev@mail.de>
-+S: Maintained
-+F: arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
-+F: board/friendlyelec/nanopi-r6s-rk3588s
-+F: configs/nanopi-r6s-rk3588s_defconfig
-+F: include/configs/nanopi-r6s-rk3588s.h
---- /dev/null
-+++ b/configs/nanopi-r6s-rk3588s_defconfig
-@@ -0,0 +1,82 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6s"
-+CONFIG_ROCKCHIP_RK3588=y
-+CONFIG_SPL_SERIAL=y
-+CONFIG_TARGET_NANOPI_R6S_RK3588S=y
-+CONFIG_DEBUG_UART_BASE=0xFEB50000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SYS_LOAD_ADDR=0xc00800
-+CONFIG_PCI=y
-+CONFIG_DEBUG_UART=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_FIT_SIGNATURE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_ATF=y
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_PCI=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_ROCKUSB=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_REGULATOR=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_OF_LIVE=y
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_SPL_DM_SEQ_ALIAS=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_SPL_CLK=y
-+# CONFIG_USB_FUNCTION_FASTBOOT is not set
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_MISC=y
-+CONFIG_SUPPORT_EMMC_RPMB=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_SDMA=y
-+CONFIG_MMC_SDHCI_ROCKCHIP=y
-+# CONFIG_SPI_FLASH is not set
-+CONFIG_PHY_REALTEK=y
-+CONFIG_DWC_ETH_QOS=y
-+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
-+CONFIG_RTL8169=y
-+CONFIG_PCIE_DW_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
-+CONFIG_PHY_ROCKCHIP_USBDP=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_PWM_ROCKCHIP=y
-+CONFIG_SPL_RAM=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_SYSRESET=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_GENERIC=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_DOWNLOAD=y
-+CONFIG_USB_FUNCTION_ROCKUSB=y
-+CONFIG_ERRNO_STR=y
---- /dev/null
-+++ b/include/configs/nanopi-r6s-rk3588s.h
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+
-+#ifndef __NANOPI_R6S_RK3588S_H
-+#define __NANOPI_R6S_RK3588S_H
-+
-+#define ROCKCHIP_DEVICE_SETTINGS \
-+ "stdout=serial,vidconsole\0" \
-+ "stderr=serial,vidconsole\0"
-+
-+#include <configs/rk3588_common.h>
-+
-+#endif /* __NANOPI_R6S_RK3588S_H */
--- /dev/null
+From 7db9ff164813afb343024d37731ab797ed7f507e Mon Sep 17 00:00:00 2001
+From: Sebastian Kropatsch <seb-dev@mail.de>
+Date: Thu, 11 Jul 2024 12:15:18 +0200
+Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6S
+
+The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
+It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
+one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
+Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
+connector, a fan connector, IR receiver as well as some buttons and LEDs.
+
+Add initial support for this board using the upstream devicetree sources.
+
+Kernel commit:
+f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
+
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
+---
+ arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi | 3 +
+ arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++
+ board/friendlyelec/nanopi-r6s-rk3588s/Kconfig | 12 +++
+ .../nanopi-r6s-rk3588s/MAINTAINERS | 7 ++
+ configs/nanopi-r6s-rk3588s_defconfig | 82 +++++++++++++++++++
+ doc/board/rockchip/rockchip.rst | 1 +
+ include/configs/nanopi-r6s-rk3588s.h | 12 +++
+ 7 files changed, 130 insertions(+)
+ create mode 100644 arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
+ create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
+ create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
+ create mode 100644 configs/nanopi-r6s-rk3588s_defconfig
+ create mode 100644 include/configs/nanopi-r6s-rk3588s.h
+
+--- /dev/null
++++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
+@@ -0,0 +1,3 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3588s-u-boot.dtsi"
+--- a/arch/arm/mach-rockchip/rk3588/Kconfig
++++ b/arch/arm/mach-rockchip/rk3588/Kconfig
+@@ -78,6 +78,18 @@ config TARGET_NANOPCT6_RK3588
+ Power: 5.5*2.1mm DC Jack, 12VDC input
+ Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
+
++config TARGET_NANOPI_R6S_RK3588S
++ bool "FriendlyElec NanoPi R6S"
++ select BOARD_LATE_INIT
++ help
++ The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip
++ RK3588s.
++ It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC
++ storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports,
++ one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a
++ 12-pin GPIO FPC connector, a fan connector, IR receiver as well
++ as some buttons and LEDs.
++
+ config TARGET_NOVA_RK3588
+ bool "Indiedroid Nova RK3588"
+ select BOARD_LATE_INIT
+@@ -232,6 +244,7 @@ config TEXT_BASE
+
+ source "board/edgeble/neural-compute-module-6/Kconfig"
+ source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
++source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig"
+ source "board/indiedroid/nova/Kconfig"
+ source "board/pine64/quartzpro64-rk3588/Kconfig"
+ source "board/turing/turing-rk1-rk3588/Kconfig"
+--- /dev/null
++++ b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
+@@ -0,0 +1,12 @@
++if TARGET_NANOPI_R6S_RK3588S
++
++config SYS_BOARD
++ default "nanopi-r6s-rk3588s"
++
++config SYS_VENDOR
++ default "friendlyelec"
++
++config SYS_CONFIG_NAME
++ default "nanopi-r6s-rk3588s"
++
++endif
+--- /dev/null
++++ b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
+@@ -0,0 +1,7 @@
++NANOPI-R6S
++M: Sebastian Kropatsch <seb-dev@mail.de>
++S: Maintained
++F: arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
++F: board/friendlyelec/nanopi-r6s-rk3588s
++F: configs/nanopi-r6s-rk3588s_defconfig
++F: include/configs/nanopi-r6s-rk3588s.h
+--- /dev/null
++++ b/configs/nanopi-r6s-rk3588s_defconfig
+@@ -0,0 +1,82 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6s"
++CONFIG_ROCKCHIP_RK3588=y
++CONFIG_SPL_SERIAL=y
++CONFIG_TARGET_NANOPI_R6S_RK3588S=y
++CONFIG_DEBUG_UART_BASE=0xFEB50000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_ROCKUSB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++# CONFIG_USB_FUNCTION_FASTBOOT is not set
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++# CONFIG_SPI_FLASH is not set
++CONFIG_PHY_REALTEK=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_RTL8169=y
++CONFIG_PCIE_DW_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_PHY_ROCKCHIP_USBDP=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_ROCKUSB=y
++CONFIG_ERRNO_STR=y
+--- /dev/null
++++ b/include/configs/nanopi-r6s-rk3588s.h
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++
++#ifndef __NANOPI_R6S_RK3588S_H
++#define __NANOPI_R6S_RK3588S_H
++
++#define ROCKCHIP_DEVICE_SETTINGS \
++ "stdout=serial,vidconsole\0" \
++ "stderr=serial,vidconsole\0"
++
++#include <configs/rk3588_common.h>
++
++#endif /* __NANOPI_R6S_RK3588S_H */
projects / openwrt / staging / thess.git / commitdiff