staging: rtl8723au: rewrite the right hand side of an assignment
authorAya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Thu, 26 Feb 2015 09:29:04 +0000 (11:29 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 26 Feb 2015 23:23:46 +0000 (15:23 -0800)
This patch rewrites the right hand side of an assignment for
expressions of the form:
a = (a <op> b);
to be:
a <op>= b;
where <op> = << | >>.

This issue was detected and resolved using the following
coccinelle script:

@@
identifier i;
expression e;
@@

-i = (i >> e);
+i >>= e;

@@
identifier i;
expression e;
@@

-i = (i << e);
+i <<= e;

Signed-off-by: Aya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723au/hal/hal_com.c

index a7751c9aecadd56493dbeb6ea7c2b084917e5ec8..c9bb3e1ff0e8f1b8e41bf1978437b198318b1a03 100644 (file)
@@ -231,7 +231,7 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS)
        rate_index = 0;
        /*  Set RTS initial rate */
        while (brate_cfg > 0x1) {
-               brate_cfg = (brate_cfg >> 1);
+               brate_cfg >>= 1;
                rate_index++;
        }
                /*  Ziv - Check */