Use intermediate variable.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 429167321cfbe48186a870e0c0ceec989e0de9c5..03100b8a45d98cb4ed560f1916ed09fdc04948cc 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -380,7 +380,7 @@ static inline void local_r4k_flush_cache_page(void *args)
         * If ownes no valid ASID yet, cannot possibly have gotten
         * this page into the cache.
         */
-       if (cpu_context(smp_processor_id(), vma->vm_mm) == 0)
+       if (cpu_context(smp_processor_id(), mm) == 0)
                return;
 
        page &= PAGE_MASK;
@@ -428,8 +428,8 @@ static inline void local_r4k_flush_cache_page(void *args)
                if (cpu_has_vtag_icache) {
                        int cpu = smp_processor_id();
 
-                       if (cpu_context(cpu, vma->vm_mm) != 0)
-                               drop_mmu_context(vma->vm_mm, cpu);
+                       if (cpu_context(cpu, mm) != 0)
+                               drop_mmu_context(mm, cpu);
                } else
                        r4k_blast_icache_page_indexed(page);
        }