ipq806x: Askey RT4230W REV6: use usual writing for pcie part

The problem has been fixed in f47cb405cafd ("ipq806x: fix pci broken
on bootm command"), now the pcie part can be written in the usual way.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
index 54356e2ff189ea43077fea76e3ca9662042870b5..0ad2dfa57bb7ab2b81e53acc9bea60987c6f9bc4 100644 (file)
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -294,14 +294,16 @@
 &pcie0 {
        status = "okay";
        reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-       /delete-property/ perst-gpios;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
 };
 
 &pcie1 {
        status = "okay";
        reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-       /delete-property/ perst-gpios;
-       force_gen1 = <1>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
 };
 
 &ART {