RDMA/bnxt_re: Enable atomics only if host bios supports
authorDevesh Sharma <devesh.sharma@broadcom.com>
Thu, 29 Jun 2017 19:28:16 +0000 (12:28 -0700)
committerDoug Ledford <dledford@redhat.com>
Thu, 20 Jul 2017 15:20:50 +0000 (11:20 -0400)
Driver shall check if the host system bios has enabled
Atomic operations capability in PCI Device Control 2
register of the pci-device. Expose the ATOMIC_HCA
flag only if the Atomic operations capability is set.

Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/infiniband/hw/bnxt_re/ib_verbs.c
drivers/infiniband/hw/bnxt_re/qplib_sp.c
drivers/infiniband/hw/bnxt_re/qplib_sp.h

index 4d3cdca03c0222e0b20ea53d53efacdf61df9ce7..7b17030d2696c83fca42ffa11a456e37fdf5e567 100644 (file)
@@ -173,8 +173,10 @@ int bnxt_re_query_device(struct ib_device *ibdev,
        ib_attr->max_pd = dev_attr->max_pd;
        ib_attr->max_qp_rd_atom = dev_attr->max_qp_rd_atom;
        ib_attr->max_qp_init_rd_atom = dev_attr->max_qp_init_rd_atom;
-       ib_attr->atomic_cap = IB_ATOMIC_HCA;
-       ib_attr->masked_atomic_cap = IB_ATOMIC_HCA;
+       if (dev_attr->is_atomic) {
+               ib_attr->atomic_cap = IB_ATOMIC_HCA;
+               ib_attr->masked_atomic_cap = IB_ATOMIC_HCA;
+       }
 
        ib_attr->max_ee_rd_atom = 0;
        ib_attr->max_res_rd_atom = 0;
index 5827573875d483295ae3e5e2607759099f146721..ef91ab786dd4c77930c49c8673ef9206f0df40ac 100644 (file)
@@ -51,6 +51,19 @@ const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0,
                                                     0, 0, 0, 0, 0, 0, 0, 0 } };
 
 /* Device */
+
+static bool bnxt_qplib_is_atomic_cap(struct bnxt_qplib_rcfw *rcfw)
+{
+       int rc;
+       u16 pcie_ctl2;
+
+       rc = pcie_capability_read_word(rcfw->pdev, PCI_EXP_DEVCTL2,
+                                      &pcie_ctl2);
+       if (rc)
+               return false;
+       return !!(pcie_ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ);
+}
+
 int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
                            struct bnxt_qplib_dev_attr *attr)
 {
@@ -131,6 +144,7 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
                attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc);
        }
 
+       attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw);
 bail:
        bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
        return rc;
index a543f959098bd11972383a9d907725c08497a8f4..2ce7e2a32cf0d28094533d38fd6df1480fc799bc 100644 (file)
@@ -42,6 +42,8 @@
 
 #define BNXT_QPLIB_RESERVED_QP_WRS     128
 
+#define PCI_EXP_DEVCTL2_ATOMIC_REQ      0x0040
+
 struct bnxt_qplib_dev_attr {
        char                            fw_ver[32];
        u16                             max_sgid;
@@ -70,6 +72,7 @@ struct bnxt_qplib_dev_attr {
        u32                             max_inline_data;
        u32                             l2_db_size;
        u8                              tqm_alloc_reqs[MAX_TQM_ALLOC_REQ];
+       bool                            is_atomic;
 };
 
 struct bnxt_qplib_pd {