-LINUX_VERSION-5.15 = .45
-LINUX_KERNEL_HASH-5.15.45 = b2390d7d977c66036ef0ceb294e408f2bdaab6dfeeb8ff4f4e0a84b71f8d8754
+LINUX_VERSION-5.15 = .46
+LINUX_KERNEL_HASH-5.15.46 = eb455746779bb79533e6c1afcd0d5e8ad2295898b786f47d718f087a3d07376b
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -3101,6 +3101,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -3110,6 +3110,7 @@ int spi_nor_scan(struct spi_nor *nor, co
struct device *dev = nor->dev;
struct mtd_info *mtd = &nor->mtd;
struct device_node *np = spi_nor_get_flash_node(nor);
int ret;
int i;
-@@ -3155,7 +3156,12 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -3164,7 +3165,12 @@ int spi_nor_scan(struct spi_nor *nor, co
if (ret)
return ret;
+++ /dev/null
-From fe19823f6053fe91a671fdbf92ab93b517a25219 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.com>
-Date: Tue, 3 Nov 2020 11:49:53 +0000
-Subject: [PATCH] Revert "mailbox: avoid timer start from callback"
-
-This reverts commit c7dacf5b0f32957b24ef29df1207dc2cd8307743.
-
-The Pi 400 shutdown/poweroff mechanism relies on being able to set
-a GPIO on the expander in the pm_power_off handler, something that
-requires two mailbox calls - GET_GPIO_STATE and SET_GPIO_STATE. A
-recent kernel change introduces a reasonable possibility that the
-GET call doesn't completes, and bisecting led to a commit from
-October that changes the timer usage of the mailbox.
-
-My theory is that there is a race condition in the new code that breaks
-the poll timer, but that it normally goes unnoticed because subsequent
-mailbox activity wakes it up again. The power-off mailbox calls happen
-at a time when other subsystems have been shut down, so if one of them
-fails then there is nothing to allow it to recover.
-
-See: https://github.com/raspberrypi/linux/issues/3941
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.com>
----
- drivers/mailbox/mailbox.c | 12 +++++-------
- 1 file changed, 5 insertions(+), 7 deletions(-)
-
---- a/drivers/mailbox/mailbox.c
-+++ b/drivers/mailbox/mailbox.c
-@@ -82,12 +82,9 @@ static void msg_submit(struct mbox_chan
- exit:
- spin_unlock_irqrestore(&chan->lock, flags);
-
-- /* kick start the timer immediately to avoid delays */
-- if (!err && (chan->txdone_method & TXDONE_BY_POLL)) {
-- /* but only if not already active */
-- if (!hrtimer_active(&chan->mbox->poll_hrt))
-- hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL);
-- }
-+ if (!err && (chan->txdone_method & TXDONE_BY_POLL))
-+ /* kick start the timer immediately to avoid delays */
-+ hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL);
- }
-
- static void tx_tick(struct mbox_chan *chan, int r)
-@@ -125,10 +122,11 @@ static enum hrtimer_restart txdone_hrtim
- struct mbox_chan *chan = &mbox->chans[i];
-
- if (chan->active_req && chan->cl) {
-- resched = true;
- txdone = chan->mbox->ops->last_tx_done(chan);
- if (txdone)
- tx_tick(chan, 0);
-+ else
-+ resched = true;
- }
- }
-
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -1839,7 +1843,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1838,7 +1842,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(skb);
skb_trim(skb, skb->len - 4); /* remove fcs */
return 1;
}
-@@ -1857,7 +1862,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1856,7 +1861,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(ax_skb);
skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -362,7 +362,7 @@ static const struct gpio_chip bcm2835_gp
+@@ -378,7 +378,7 @@ static const struct gpio_chip bcm2835_gp
.get = bcm2835_gpio_get,
.set = bcm2835_gpio_set,
.set_config = gpiochip_generic_config,
+ .base = 0,
.ngpio = BCM2835_NUM_GPIOS,
.can_sleep = false,
- };
-@@ -378,7 +378,7 @@ static const struct gpio_chip bcm2711_gp
+ .of_gpio_ranges_fallback = bcm2835_of_gpio_ranges_fallback,
+@@ -395,7 +395,7 @@ static const struct gpio_chip bcm2711_gp
.get = bcm2835_gpio_get,
.set = bcm2835_gpio_set,
.set_config = gpiochip_generic_config,
+ .base = 0,
.ngpio = BCM2711_NUM_GPIOS,
.can_sleep = false,
- };
+ .of_gpio_ranges_fallback = bcm2835_of_gpio_ranges_fallback,
config SND_SOC_MADERA
tristate
default y if SND_SOC_CS47L15=y
-@@ -1189,6 +1200,10 @@ config SND_SOC_RT5616
+@@ -1187,6 +1198,10 @@ config SND_SOC_RT5616
tristate "Realtek RT5616 CODEC"
depends on I2C
config SND_SOC_RT5631
tristate "Realtek ALC5631/RT5631 CODEC"
depends on I2C
-@@ -1439,6 +1454,9 @@ config SND_SOC_TFA9879
+@@ -1437,6 +1452,9 @@ config SND_SOC_TFA9879
tristate "NXP Semiconductors TFA9879 amplifier"
depends on I2C
config SND_SOC_TFA989X
tristate "NXP/Goodix TFA989X (TFA1) amplifiers"
depends on I2C
-@@ -1945,4 +1963,8 @@ config SND_SOC_LPASS_TX_MACRO
+@@ -1943,4 +1961,8 @@ config SND_SOC_LPASS_TX_MACRO
select REGMAP_MMIO
tristate "Qualcomm TX Macro in LPASS(Low Power Audio SubSystem)"
extern int usb_driver_set_configuration(struct usb_device *udev, int config);
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
-@@ -382,6 +382,11 @@ struct hc_driver {
+@@ -384,6 +384,11 @@ struct hc_driver {
* or bandwidth constraints.
*/
void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *);
/* Returns the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev);
/* prepares the hardware to send commands to the device */
-@@ -446,6 +451,8 @@ extern void usb_hcd_unmap_urb_setup_for_
+@@ -448,6 +453,8 @@ extern void usb_hcd_unmap_urb_setup_for_
extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *);
extern void usb_hcd_flush_endpoint(struct usb_device *udev,
struct usb_host_endpoint *ep);
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -1321,7 +1321,7 @@ static int bcm2835_pinctrl_probe(struct
+@@ -1339,7 +1339,7 @@ static int bcm2835_pinctrl_probe(struct
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_level_irq;
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
-@@ -245,6 +245,8 @@ static struct property *dup_and_fixup_sy
+@@ -243,6 +243,8 @@ static struct property *dup_and_fixup_sy
if (!target_path)
return NULL;
target_path_len = strlen(target_path);
+++ /dev/null
-From d9f70317612c5b3b558fd4b52c57e52832d34d52 Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Thu, 8 Jul 2021 13:48:11 +0100
-Subject: [PATCH] bcm2711_thermal: Don't clamp temperature at zero
-
-The temperature sensor is valid below zero and the linux framework is happy with it.
-
-See: https://www.raspberrypi.org/forums/viewtopic.php?f=98&t=315382
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/thermal/broadcom/bcm2711_thermal.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/thermal/broadcom/bcm2711_thermal.c
-+++ b/drivers/thermal/broadcom/bcm2711_thermal.c
-@@ -52,7 +52,7 @@ static int bcm2711_get_temp(void *data,
- /* Convert a HW code to a temperature reading (millidegree celsius) */
- t = slope * val + offset;
-
-- *temp = t < 0 ? 0 : t;
-+ *temp = t;
-
- return 0;
- }
static const struct drm_display_mode innolux_at070tn92_mode = {
.clock = 33333,
.hdisplay = 800,
-@@ -4659,6 +4691,9 @@ static const struct of_device_id platfor
+@@ -4660,6 +4692,9 @@ static const struct of_device_id platfor
.compatible = "innolux,at043tn24",
.data = &innolux_at043tn24,
}, {
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -975,7 +975,10 @@ enum hvs_pixel_format {
+@@ -983,7 +983,10 @@ enum hvs_pixel_format {
#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
#define SCALER_CSC0_ITR_R_601_5 0x00f00000
#define SCALER_CSC0_ITR_R_709_3 0x00f00000
/* S2.8 contribution of Cb to Green */
#define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22)
-@@ -990,8 +993,11 @@ enum hvs_pixel_format {
+@@ -998,8 +1001,11 @@ enum hvs_pixel_format {
#define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0)
#define SCALER_CSC1_COEF_CR_BLU_SHIFT 0
#define SCALER_CSC1_ITR_R_601_5 0xe73304a8
/* S2.8 contribution of Cb to Red */
#define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20)
-@@ -1002,9 +1008,12 @@ enum hvs_pixel_format {
+@@ -1010,9 +1016,12 @@ enum hvs_pixel_format {
/* S2.8 contribution of Cb to Blue */
#define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10)
#define SCALER_CSC2_COEF_CB_BLU_SHIFT 10
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
-@@ -689,6 +728,8 @@ static int vc4_hvs_bind(struct device *d
+@@ -728,6 +767,8 @@ static int vc4_hvs_bind(struct device *d
vc4_debugfs_add_regset32(drm, "hvs_regs", &hvs->regset);
vc4_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun,
NULL);
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
-@@ -1902,6 +1902,8 @@ static const struct usb_audio_quirk_flag
+@@ -1908,6 +1908,8 @@ static const struct usb_audio_quirk_flag
QUIRK_FLAG_ALIGN_TRANSFER),
DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */
QUIRK_FLAG_GET_SAMPLE_RATE),
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -3758,6 +3758,31 @@ static const struct panel_desc qishenglo
+@@ -3759,6 +3759,31 @@ static const struct panel_desc qishenglo
.connector_type = DRM_MODE_CONNECTOR_DPI,
};
static const struct display_timing rocktech_rk070er9427_timing = {
.pixelclock = { 26400000, 33300000, 46800000 },
.hactive = { 800, 800, 800 },
-@@ -4838,6 +4863,9 @@ static const struct of_device_id platfor
+@@ -4839,6 +4864,9 @@ static const struct of_device_id platfor
.compatible = "qishenglong,gopher2b-lcd",
.data = &qishenglong_gopher2b_lcd,
}, {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -236,6 +236,80 @@ static void vc4_hvs_update_gamma_lut(str
- vc4_hvs_lut_load(crtc);
+@@ -259,6 +259,80 @@ u8 vc4_hvs_get_fifo_frame_count(struct d
+ return field;
}
+static void vc5_hvs_write_gamma_entry(struct vc4_dev *vc4,
int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output)
{
struct vc4_dev *vc4 = to_vc4_dev(dev);
-@@ -329,14 +403,16 @@ static int vc4_hvs_init_channel(struct v
+@@ -352,14 +426,16 @@ static int vc4_hvs_init_channel(struct v
dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx |
return 0;
}
-@@ -534,7 +610,10 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -557,7 +633,10 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel));
if (crtc->state->gamma_lut) {
/* Unsetting DISPBKGND_GAMMA skips the gamma lut step
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -491,6 +491,28 @@
+@@ -499,6 +499,28 @@
#define SCALER_DLIST_START 0x00002000
#define SCALER_DLIST_SIZE 0x00004000
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
-@@ -809,6 +887,9 @@ static int vc4_hvs_bind(struct device *d
+@@ -848,6 +926,9 @@ static int vc4_hvs_bind(struct device *d
NULL);
vc4_debugfs_add_file(drm, "hvs_dlists", vc4_hvs_debugfs_dlist,
NULL);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -519,6 +519,36 @@ void vc4_hvs_stop_channel(struct drm_dev
+@@ -542,6 +542,36 @@ void vc4_hvs_stop_channel(struct drm_dev
SCALER_DISPSTATX_EMPTY);
}
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
-@@ -549,7 +579,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -572,7 +602,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
if (ret)
return ret;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -480,8 +480,12 @@ static int vc4_hvs_init_channel(struct v
+@@ -503,8 +503,12 @@ static int vc4_hvs_init_channel(struct v
dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
(interlace ? SCALER_DISPBKGND_INTERLACE : 0));
/* Reload the LUT, since the SRAMs would have been disabled if
-@@ -718,17 +722,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -741,17 +745,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel));
if (crtc->state->gamma_lut) {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -538,6 +538,16 @@ static int vc4_hvs_gamma_check(struct dr
+@@ -561,6 +561,16 @@ static int vc4_hvs_gamma_check(struct dr
if (!crtc_state->color_mgmt_changed)
return 0;
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
-@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic
+@@ -300,6 +300,7 @@ static void xhci_pci_quirks(struct devic
if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
xhci->quirks |= XHCI_LPM_SUPPORT;
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
cycle_state, type, max_packet, flags);
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
-@@ -299,6 +299,7 @@ static void xhci_pci_quirks(struct devic
+@@ -301,6 +301,7 @@ static void xhci_pci_quirks(struct devic
xhci->quirks |= XHCI_LPM_SUPPORT;
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -674,6 +674,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -697,6 +697,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
struct drm_plane *plane;
struct vc4_plane_state *vc4_plane_state;
bool debug_dump_regs = false;
-@@ -714,8 +715,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -737,8 +738,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
/* This sets a black background color fill, as is the case
* with other DRM drivers.
*/
SCALER_DISPBKGND_FILL);
/* Only update DISPLIST if the CRTC was already running and is not
-@@ -729,7 +730,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -752,7 +753,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
vc4_hvs_update_dlist(crtc);
if (crtc->state->color_mgmt_changed) {
if (crtc->state->gamma_lut) {
if (!vc4->hvs->hvs5) {
-@@ -752,7 +753,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -775,7 +776,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
if (!vc4->hvs->hvs5)
dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
}
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -616,15 +616,12 @@ static void vc4_hvs_update_dlist(struct
+@@ -639,15 +639,12 @@ static void vc4_hvs_update_dlist(struct
crtc->state->event = NULL;
}
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -596,10 +596,19 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -619,10 +619,19 @@ int vc4_hvs_atomic_check(struct drm_crtc
return vc4_hvs_gamma_check(crtc, state);
}
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
unsigned long flags;
-@@ -619,9 +628,6 @@ static void vc4_hvs_update_dlist(struct
+@@ -642,9 +651,6 @@ static void vc4_hvs_update_dlist(struct
spin_unlock_irqrestore(&dev->event_lock, flags);
}
spin_lock_irqsave(&vc4_crtc->irq_lock, flags);
vc4_crtc->current_dlist = vc4_state->mm.start;
spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags);
-@@ -648,6 +654,7 @@ void vc4_hvs_atomic_enable(struct drm_cr
+@@ -671,6 +677,7 @@ void vc4_hvs_atomic_enable(struct drm_cr
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
bool oneshot = vc4_crtc->feeds_txp;
vc4_hvs_update_dlist(crtc);
vc4_hvs_init_channel(vc4, crtc, mode, oneshot);
}
-@@ -723,8 +730,10 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -746,8 +753,10 @@ void vc4_hvs_atomic_flush(struct drm_crt
* If the CRTC is being disabled, there's no point in updating this
* information.
*/
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -686,6 +686,9 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -709,6 +709,9 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
u32 __iomem *dlist_next = dlist_start;
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -796,6 +796,9 @@ enum {
+@@ -804,6 +804,9 @@ enum {
# define VC4_HD_CSC_CTL_RGB2YCC BIT(1)
# define VC4_HD_CSC_CTL_ENABLE BIT(0)
static inline
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -796,11 +796,27 @@ enum {
+@@ -804,11 +804,27 @@ enum {
# define VC4_HD_CSC_CTL_RGB2YCC BIT(1)
# define VC4_HD_CSC_CTL_ENABLE BIT(0)
static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
.clock = 9000,
.hdisplay = 480,
-@@ -4701,6 +4727,9 @@ static const struct of_device_id platfor
+@@ -4702,6 +4728,9 @@ static const struct of_device_id platfor
.compatible = "friendlyarm,hd702e",
.data = &friendlyarm_hd702e,
}, {
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
-@@ -300,6 +300,7 @@ static void xhci_pci_quirks(struct devic
+@@ -302,6 +302,7 @@ static void xhci_pci_quirks(struct devic
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG;
+++ /dev/null
-From 77579d5ba35bf6e13f0ed09097c475f178d3c270 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 17 Feb 2022 10:55:26 +0100
-Subject: [PATCH] drm/vc4: hvs: Fix frame count register readout
-
-In order to get the field currently being output, the driver has been
-using the display FIFO frame count in the HVS, reading a 6-bit field at
-the offset 12 in the DISPSTATx register.
-
-While that field is indeed at that location for the FIFO 1 and 2, the
-one for the FIFO0 is actually in the DISPSTAT1 register, at the offset
-18.
-
-Fixes: e538092cb15c ("drm/vc4: Enable precise vblank timestamping for interlaced modes.")
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
- drivers/gpu/drm/vc4/vc4_drv.h | 1 +
- drivers/gpu/drm/vc4/vc4_hvs.c | 23 +++++++++++++++++++++++
- drivers/gpu/drm/vc4/vc4_regs.h | 12 ++++++++++--
- 4 files changed, 35 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -123,7 +123,7 @@ static bool vc4_crtc_get_scanout_positio
- *vpos /= 2;
-
- /* Use hpos to correct for field offset in interlaced mode. */
-- if (VC4_GET_FIELD(val, SCALER_DISPSTATX_FRAME_COUNT) % 2)
-+ if (vc4_hvs_get_fifo_frame_count(dev, vc4_crtc_state->assigned_channel) % 2)
- *hpos += mode->crtc_htotal / 2;
- }
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -967,6 +967,7 @@ void vc4_irq_reset(struct drm_device *de
- extern struct platform_driver vc4_hvs_driver;
- void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int output);
- int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output);
-+u8 vc4_hvs_get_fifo_frame_count(struct drm_device *dev, unsigned int fifo);
- int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state);
- void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state);
- void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -388,6 +388,29 @@ static void vc5_hvs_update_gamma_lut(str
- vc5_hvs_lut_load(crtc);
- }
-
-+u8 vc4_hvs_get_fifo_frame_count(struct drm_device *dev, unsigned int fifo)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ u8 field = 0;
-+
-+ switch (fifo) {
-+ case 0:
-+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
-+ SCALER_DISPSTAT1_FRCNT0);
-+ break;
-+ case 1:
-+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
-+ SCALER_DISPSTAT1_FRCNT1);
-+ break;
-+ case 2:
-+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
-+ SCALER_DISPSTAT2_FRCNT2);
-+ break;
-+ }
-+
-+ return field;
-+}
-+
- int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -379,8 +379,6 @@
- # define SCALER_DISPSTATX_MODE_EOF 3
- # define SCALER_DISPSTATX_FULL BIT(29)
- # define SCALER_DISPSTATX_EMPTY BIT(28)
--# define SCALER_DISPSTATX_FRAME_COUNT_MASK VC4_MASK(17, 12)
--# define SCALER_DISPSTATX_FRAME_COUNT_SHIFT 12
- # define SCALER_DISPSTATX_LINE_MASK VC4_MASK(11, 0)
- # define SCALER_DISPSTATX_LINE_SHIFT 0
-
-@@ -403,9 +401,15 @@
- (x) * (SCALER_DISPBKGND1 - \
- SCALER_DISPBKGND0))
- #define SCALER_DISPSTAT1 0x00000058
-+# define SCALER_DISPSTAT1_FRCNT0_MASK VC4_MASK(23, 18)
-+# define SCALER_DISPSTAT1_FRCNT0_SHIFT 18
-+# define SCALER_DISPSTAT1_FRCNT1_MASK VC4_MASK(17, 12)
-+# define SCALER_DISPSTAT1_FRCNT1_SHIFT 12
-+
- #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \
- (x) * (SCALER_DISPSTAT1 - \
- SCALER_DISPSTAT0))
-+
- #define SCALER_DISPBASE1 0x0000005c
- #define SCALER_DISPBASEX(x) (SCALER_DISPBASE0 + \
- (x) * (SCALER_DISPBASE1 - \
-@@ -415,7 +419,11 @@
- (x) * (SCALER_DISPCTRL1 - \
- SCALER_DISPCTRL0))
- #define SCALER_DISPBKGND2 0x00000064
-+
- #define SCALER_DISPSTAT2 0x00000068
-+# define SCALER_DISPSTAT2_FRCNT2_MASK VC4_MASK(17, 12)
-+# define SCALER_DISPSTAT2_FRCNT2_SHIFT 12
-+
- #define SCALER_DISPBASE2 0x0000006c
- #define SCALER_DISPALPHA2 0x00000070
- #define SCALER_GAMADDR 0x00000078
u32 i;
for (i = 0; i < length; i++) {
-@@ -311,10 +312,10 @@ static void vc4_hvs_update_gamma_lut(str
+@@ -311,12 +312,11 @@ static void vc4_hvs_update_gamma_lut(str
vc4_crtc->lut_b[i] = drm_color_lut_extract(lut[i].blue, 8);
}
+ vc4_hvs_lut_load(hvs, vc4_crtc);
}
+-u8 vc4_hvs_get_fifo_frame_count(struct drm_device *dev, unsigned int fifo)
++u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
+ {
+- struct vc4_dev *vc4 = to_vc4_dev(dev);
+ u8 field = 0;
+
+ switch (fifo) {
+@@ -337,7 +337,7 @@ u8 vc4_hvs_get_fifo_frame_count(struct d
+ return field;
+ }
+
-static void vc5_hvs_write_gamma_entry(struct vc4_dev *vc4,
+static void vc5_hvs_write_gamma_entry(struct vc4_hvs *hvs,
u32 offset,
struct vc5_gamma_entry *gamma)
{
-@@ -322,33 +323,33 @@ static void vc5_hvs_write_gamma_entry(st
+@@ -345,33 +345,33 @@ static void vc5_hvs_write_gamma_entry(st
HVS_WRITE(offset + 4, gamma->grad_term);
}
struct drm_color_lut *lut = crtc->state->gamma_lut->data;
unsigned int step, i;
u32 start, end;
-@@ -385,12 +386,11 @@ static void vc5_hvs_update_gamma_lut(str
+@@ -408,16 +408,15 @@ static void vc5_hvs_update_gamma_lut(str
VC5_HVS_UPDATE_GAMMA_ENTRY_FROM_LUT(pwl_b, blue);
}
+ vc5_hvs_lut_load(hvs, vc4_crtc);
}
--u8 vc4_hvs_get_fifo_frame_count(struct drm_device *dev, unsigned int fifo)
-+u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
- {
-- struct vc4_dev *vc4 = to_vc4_dev(dev);
- u8 field = 0;
-
- switch (fifo) {
-@@ -411,13 +411,12 @@ u8 vc4_hvs_get_fifo_frame_count(struct d
- return field;
- }
-
-int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output)
+int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output)
{
void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -389,6 +389,150 @@ static void vc5_hvs_update_gamma_lut(str
- vc5_hvs_lut_load(hvs, vc4_crtc);
+@@ -315,6 +315,150 @@ static void vc4_hvs_update_gamma_lut(str
+ vc4_hvs_lut_load(hvs, vc4_crtc);
}
+static void vc4_hvs_irq_enable_eof(const struct vc4_hvs *hvs,
}
/* Clear every per-channel interrupt flag. */
-@@ -902,6 +1055,8 @@ static int vc4_hvs_bind(struct device *d
+@@ -903,6 +1056,8 @@ static int vc4_hvs_bind(struct device *d
hvs->dlist = hvs->regs + SCALER5_DLIST_START;
spin_lock_init(&hvs->mm_lock);
+++ /dev/null
-From d2a60430df21f213b9b9d2eb46d2f4afbbea3213 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Fri, 4 Mar 2022 16:24:00 +0100
-Subject: [PATCH] drm/vc4: hvs: Reset muxes at probe time
-
-By default, the HVS driver will force the HVS output 3 to be muxed to
-the HVS channel 2. However, the Transposer can only be assigned to the
-HVS channel 2, so whenever we try to use the writeback connector, we'll
-mux its associated output (Output 2) to the channel 2.
-
-This leads to both the output 2 and 3 feeding from the same channel,
-which is explicitly discouraged in the documentation.
-
-In order to avoid this, let's reset all the output muxes to their reset
-value.
-
-Fixes: 87ebcd42fb7b ("drm/vc4: crtc: Assign output to channel automatically")
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_hvs.c | 26 +++++++++++++++++++++-----
- 1 file changed, 21 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1017,6 +1017,7 @@ static int vc4_hvs_bind(struct device *d
- struct vc4_hvs *hvs = NULL;
- int ret;
- u32 dispctrl;
-+ u32 reg;
-
- hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
- if (!hvs)
-@@ -1090,6 +1091,26 @@ static int vc4_hvs_bind(struct device *d
-
- vc4->hvs = hvs;
-
-+ reg = HVS_READ(SCALER_DISPECTRL);
-+ reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK;
-+ HVS_WRITE(SCALER_DISPECTRL,
-+ reg | VC4_SET_FIELD(0, SCALER_DISPECTRL_DSP2_MUX));
-+
-+ reg = HVS_READ(SCALER_DISPCTRL);
-+ reg &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
-+ HVS_WRITE(SCALER_DISPCTRL,
-+ reg | VC4_SET_FIELD(3, SCALER_DISPCTRL_DSP3_MUX));
-+
-+ reg = HVS_READ(SCALER_DISPEOLN);
-+ reg &= ~SCALER_DISPEOLN_DSP4_MUX_MASK;
-+ HVS_WRITE(SCALER_DISPEOLN,
-+ reg | VC4_SET_FIELD(3, SCALER_DISPEOLN_DSP4_MUX));
-+
-+ reg = HVS_READ(SCALER_DISPDITHER);
-+ reg &= ~SCALER_DISPDITHER_DSP5_MUX_MASK;
-+ HVS_WRITE(SCALER_DISPDITHER,
-+ reg | VC4_SET_FIELD(3, SCALER_DISPDITHER_DSP5_MUX));
-+
- dispctrl = HVS_READ(SCALER_DISPCTRL);
-
- dispctrl |= SCALER_DISPCTRL_ENABLE;
-@@ -1097,10 +1118,6 @@ static int vc4_hvs_bind(struct device *d
- SCALER_DISPCTRL_DISPEIRQ(1) |
- SCALER_DISPCTRL_DISPEIRQ(2);
-
-- /* Set DSP3 (PV1) to use HVS channel 2, which would otherwise
-- * be unused.
-- */
-- dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
- dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ |
- SCALER_DISPCTRL_SLVWREIRQ |
- SCALER_DISPCTRL_SLVRDEIRQ |
-@@ -1114,7 +1131,6 @@ static int vc4_hvs_bind(struct device *d
- SCALER_DISPCTRL_DSPEISLUR(1) |
- SCALER_DISPCTRL_DSPEISLUR(2) |
- SCALER_DISPCTRL_SCLEIRQ);
-- dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX);
-
- HVS_WRITE(SCALER_DISPCTRL, dispctrl);
-
+++ /dev/null
-From b93868be23764905325c200832d58c4f2c0dda7a Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Fri, 4 Mar 2022 15:55:25 +0100
-Subject: [PATCH] drm/vc4: txp: Don't set TXP_VSTART_AT_EOF
-
-The TXP_VSTART_AT_EOF will generate a second VSTART signal to the HVS.
-However, the HVS waits for VSTART to enable the FIFO and will thus start
-filling the FIFO before the start of the frame.
-
-This leads to corruption at the beginning of the first frame, and
-content from the previous frame at the beginning of the next frames.
-
-Since one VSTART is enough, let's get rid of it.
-
-Fixes: 008095e065a8 ("drm/vc4: Add support for the transposer block")
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_txp.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_txp.c
-+++ b/drivers/gpu/drm/vc4/vc4_txp.c
-@@ -298,7 +298,7 @@ static void vc4_txp_connector_atomic_com
- if (WARN_ON(i == ARRAY_SIZE(drm_fmts)))
- return;
-
-- ctrl = TXP_GO | TXP_VSTART_AT_EOF | TXP_EI |
-+ ctrl = TXP_GO | TXP_EI |
- VC4_SET_FIELD(0xf, TXP_BYTE_ENABLE) |
- VC4_SET_FIELD(txp_fmts[i], TXP_FORMAT);
-
+++ /dev/null
-From f605781b135e2ebe98aba1d569167bb0d0886930 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Fri, 4 Mar 2022 16:00:16 +0100
-Subject: [PATCH] drm/vc4: txp: Force alpha to be 0xff if it's disabled
-
-If we use a format that has padding instead of the alpha component (such
-as XRGB8888), it appears that the Transposer will fill the padding to 0,
-disregarding what was stored in the input buffer padding.
-
-This leads to issues with IGT, since it will set the padding to 0xff,
-but will then compare the CRC of the two frames which will thus fail.
-
-Fixes: 008095e065a8 ("drm/vc4: Add support for the transposer block")
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_txp.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_txp.c
-+++ b/drivers/gpu/drm/vc4/vc4_txp.c
-@@ -304,6 +304,8 @@ static void vc4_txp_connector_atomic_com
-
- if (fb->format->has_alpha)
- ctrl |= TXP_ALPHA_ENABLE;
-+ else
-+ ctrl |= TXP_ALPHA_INVERT;
-
- gem = drm_fb_cma_get_gem_obj(fb, 0);
- TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]);
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -892,9 +892,12 @@ static int bcm2835_pmx_free(struct pinct
+@@ -910,9 +910,12 @@ static int bcm2835_pmx_free(struct pinct
unsigned offset)
{
struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
return 0;
}
-@@ -936,10 +939,7 @@ static void bcm2835_pmx_gpio_disable_fre
+@@ -954,10 +957,7 @@ static void bcm2835_pmx_gpio_disable_fre
struct pinctrl_gpio_range *range,
unsigned offset)
{
void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -389,150 +389,6 @@ static void vc5_hvs_update_gamma_lut(str
- vc5_hvs_lut_load(hvs, vc4_crtc);
+@@ -315,150 +315,6 @@ static void vc4_hvs_update_gamma_lut(str
+ vc4_hvs_lut_load(hvs, vc4_crtc);
}
-static void vc4_hvs_irq_enable_eof(const struct vc4_hvs *hvs,
--- a/drivers/thermal/broadcom/bcm2711_thermal.c
+++ b/drivers/thermal/broadcom/bcm2711_thermal.c
-@@ -95,7 +95,7 @@ static int bcm2711_thermal_probe(struct
+@@ -92,7 +92,7 @@ static int bcm2711_thermal_probe(struct
&bcm2711_thermal_of_ops);
if (IS_ERR(thermal)) {
ret = PTR_ERR(thermal);
* rate higher than 297MHz, it needs some adjustments in the
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -413,10 +413,11 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
+@@ -413,10 +413,11 @@ static void vc5_hvs_update_gamma_lut(str
int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output)
{
+++ /dev/null
-From 31fd9b79dc580301c53a001482755ba7e88c2809 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Fri, 29 Oct 2021 18:05:23 +0200
-Subject: [PATCH] ARM: dts: BCM5301X: update CRU block description
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This describes CRU in a way matching documentation and fixes:
-
-arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: cru@100: $nodename:0: 'cru@100' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
- From schema: /lib/python3.6/site-packages/dtschema/schemas/simple-bus.yaml
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 13 +++++++++----
- 1 file changed, 9 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -423,14 +423,14 @@
- #address-cells = <1>;
- #size-cells = <1>;
-
-- cru@100 {
-- compatible = "simple-bus";
-+ cru-bus@100 {
-+ compatible = "brcm,ns-cru", "simple-mfd";
- reg = <0x100 0x1a4>;
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
-
-- lcpll0: lcpll0@100 {
-+ lcpll0: clock-controller@100 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-lcpll0";
- reg = <0x100 0x14>;
-@@ -439,7 +439,7 @@
- "sdio", "ddr_phy";
- };
-
-- genpll: genpll@140 {
-+ genpll: clock-controller@140 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-genpll";
- reg = <0x140 0x24>;
-@@ -450,6 +450,11 @@
- "sata1", "sata2";
- };
-
-+ syscon@180 {
-+ compatible = "brcm,cru-clkset", "syscon";
-+ reg = <0x180 0x4>;
-+ };
-+
- pinctrl: pin-controller@1c0 {
- compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
if (ret < 0) {
pr_err("%s: failed to add hogs for %pOF\n", __func__,
rd->dn);
-@@ -1030,9 +1040,11 @@ int of_gpiochip_add(struct gpio_chip *ch
+@@ -1035,9 +1045,11 @@ int of_gpiochip_add(struct gpio_chip *ch
of_node_get(chip->of_node);
+++ /dev/null
-From 96a3295c351da82d7af99b2fc004a3cf9f4716a9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
-Date: Mon, 28 Mar 2022 18:11:08 +0200
-Subject: [PATCH] mtdblock: warn if opened on NAND
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Warning on every translated mtd partition results in excessive log noise
-if this driver is loaded:
-
- nand: device found, Manufacturer ID: 0xc2, Chip ID: 0xf1
- nand: Macronix MX30LF1G18AC
- nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
- mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits
- read_bbt: found bbt at block 1023
- 10 fixed-partitions partitions found on MTD device mt7621-nand
- Creating 10 MTD partitions on "mt7621-nand":
- 0x000000000000-0x000000080000 : "Bootloader"
- mtdblock: MTD device 'Bootloader' is NAND, please consider using UBI block devices instead.
- 0x000000080000-0x000000100000 : "Config"
- mtdblock: MTD device 'Config' is NAND, please consider using UBI block devices instead.
- 0x000000100000-0x000000140000 : "Factory"
- mtdblock: MTD device 'Factory' is NAND, please consider using UBI block devices instead.
- 0x000000140000-0x000002000000 : "Kernel"
- mtdblock: MTD device 'Kernel' is NAND, please consider using UBI block devices instead.
- 0x000000540000-0x000002000000 : "ubi"
- mtdblock: MTD device 'ubi' is NAND, please consider using UBI block devices instead.
- 0x000002140000-0x000004000000 : "Kernel2"
- mtdblock: MTD device 'Kernel2' is NAND, please consider using UBI block devices instead.
- 0x000004000000-0x000004100000 : "wwan"
- mtdblock: MTD device 'wwan' is NAND, please consider using UBI block devices instead.
- 0x000004100000-0x000005100000 : "data"
- mtdblock: MTD device 'data' is NAND, please consider using UBI block devices instead.
- 0x000005100000-0x000005200000 : "rom-d"
- mtdblock: MTD device 'rom-d' is NAND, please consider using UBI block devices instead.
- 0x000005200000-0x000005280000 : "reserve"
- mtdblock: MTD device 'reserve' is NAND, please consider using UBI block devices instead.
- mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
-
-This is more likely to annoy than to help users of embedded distros where
-this driver is enabled by default. Making the blockdevs available does
-not imply that they are in use, and warning about bootloader partitions
-or other devices which obviously never will be mounted is more confusing
-than helpful.
-
-Move the warning to open(), where it will be of more use - actually warning
-anyone who mounts a file system on NAND using mtdblock.
-
-Fixes: e07403a8c6be ("mtdblock: Warn if added for a NAND device")
-Signed-off-by: Bjørn Mork <bjorn@mork.no>
-Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20220328161108.87757-1-bjorn@mork.no
----
- drivers/mtd/mtdblock.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/mtdblock.c
-+++ b/drivers/mtd/mtdblock.c
-@@ -257,6 +257,10 @@ static int mtdblock_open(struct mtd_blkt
- return 0;
- }
-
-+ if (mtd_type_is_nand(mbd->mtd))
-+ pr_warn("%s: MTD device '%s' is NAND, please consider using UBI block devices instead.\n",
-+ mbd->tr->name, mbd->mtd->name);
-+
- /* OK, it's not open. Create cache info for it */
- mtdblk->count = 1;
- mutex_init(&mtdblk->cache_mutex);
-@@ -322,10 +326,6 @@ static void mtdblock_add_mtd(struct mtd_
- if (!(mtd->flags & MTD_WRITEABLE))
- dev->mbd.readonly = 1;
-
-- if (mtd_type_is_nand(mtd))
-- pr_warn("%s: MTD device '%s' is NAND, please consider using UBI block devices instead.\n",
-- tr->name, mtd->name);
--
- if (add_mtd_blktrans_dev(&dev->mbd))
- kfree(dev);
- }
+++ /dev/null
-From a4f9dd55c5e1bb951db6f1dee20e62e0103f3438 Mon Sep 17 00:00:00 2001
-From: Chuanhong Guo <gch981213@gmail.com>
-Date: Sun, 20 Mar 2022 17:59:57 +0800
-Subject: [PATCH 1/5] mtd: spinand: gigadevice: fix Quad IO for GD5F1GQ5UExxG
-
-Read From Cache Quad IO (EBH) uses 2 dummy bytes on this chip according
-to page 23 of the datasheet[0].
-
-[0]: https://www.gigadevice.com/datasheet/gd5f1gq5xexxg/
-
-Fixes: 469b99248985 ("mtd: spinand: gigadevice: Support GD5F1GQ5UExxG")
-Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-2-gch981213@gmail.com
----
- drivers/mtd/nand/spi/gigadevice.c | 10 +++++++++-
- 1 file changed, 9 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/nand/spi/gigadevice.c
-+++ b/drivers/mtd/nand/spi/gigadevice.c
-@@ -39,6 +39,14 @@ static SPINAND_OP_VARIANTS(read_cache_va
- SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0),
- SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0));
-
-+static SPINAND_OP_VARIANTS(read_cache_variants_1gq5,
-+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
-+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
-+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
-+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
-+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
-+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
-+
- static SPINAND_OP_VARIANTS(write_cache_variants,
- SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
- SPINAND_PROG_LOAD(true, 0, NULL, 0));
-@@ -339,7 +347,7 @@ static const struct spinand_info gigadev
- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51),
- NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
- NAND_ECCREQ(4, 512),
-- SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5,
- &write_cache_variants,
- &update_cache_variants),
- SPINAND_HAS_QE_BIT,
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -2347,6 +2347,13 @@ config UNUSED_KSYMS_WHITELIST
+@@ -2352,6 +2352,13 @@ config UNUSED_KSYMS_WHITELIST
one per line. The path can be absolute, or relative to the kernel
source tree.
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -2379,7 +2379,7 @@ config PADATA
+@@ -2384,7 +2384,7 @@ config PADATA
bool
config ASN1
help
--- a/net/core/dev.c
+++ b/net/core/dev.c
-@@ -3582,6 +3582,11 @@ static int xmit_one(struct sk_buff *skb,
+@@ -3586,6 +3586,11 @@ static int xmit_one(struct sk_buff *skb,
if (dev_nit_active(dev))
dev_queue_xmit_nit(skb, dev);
#include "gpiolib.h"
#include "gpiolib-of.h"
-@@ -1052,3 +1054,72 @@ void of_gpio_dev_init(struct gpio_chip *
+@@ -1057,3 +1059,72 @@ void of_gpio_dev_init(struct gpio_chip *
else
gc->of_node = gdev->dev.of_node;
}
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1438,6 +1438,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
+@@ -1443,6 +1443,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
the unaligned access emulation.
see arch/parisc/kernel/unaligned.c for reference
default y
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -1262,6 +1262,8 @@ static u8 spi_nor_convert_3to4_erase(u8
+@@ -1271,6 +1271,8 @@ static u8 spi_nor_convert_3to4_erase(u8
static bool spi_nor_has_uniform_erase(const struct spi_nor *nor)
{
return !!nor->params->erase_map.uniform_erase_type;
}
-@@ -2379,6 +2381,7 @@ static int spi_nor_select_erase(struct s
+@@ -2388,6 +2390,7 @@ static int spi_nor_select_erase(struct s
{
struct spi_nor_erase_map *map = &nor->params->erase_map;
const struct spi_nor_erase_type *erase = NULL;
struct mtd_info *mtd = &nor->mtd;
u32 wanted_size = nor->info->sector_size;
int i;
-@@ -2411,8 +2414,9 @@ static int spi_nor_select_erase(struct s
+@@ -2420,8 +2423,9 @@ static int spi_nor_select_erase(struct s
*/
for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) {
if (map->erase_type[i].size) {
}
}
-@@ -2420,6 +2424,8 @@ static int spi_nor_select_erase(struct s
+@@ -2429,6 +2433,8 @@ static int spi_nor_select_erase(struct s
return -EINVAL;
mtd->erasesize = erase->size;
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -914,7 +914,7 @@ static int get_chip(struct map_info *map
+@@ -907,7 +907,7 @@ static int get_chip(struct map_info *map
return 0;
case FL_ERASING:
1 file changed, 1 insertion(+)
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -2058,6 +2058,7 @@ static int __xipram do_write_buffer(stru
+@@ -2051,6 +2051,7 @@ static int __xipram do_write_buffer(stru
/* Write Buffer Load */
map_write(map, CMD(0x25), cmd_adr);
endif # MTD_SPI_NOR
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -2631,6 +2631,21 @@ static void spi_nor_info_init_params(str
+@@ -2640,6 +2640,21 @@ static void spi_nor_info_init_params(str
*/
erase_mask = 0;
i = 0;
if (info->flags & SECT_4K_PMC) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-@@ -2642,6 +2657,7 @@ static void spi_nor_info_init_params(str
+@@ -2651,6 +2666,7 @@ static void spi_nor_info_init_params(str
SPINOR_OP_BE_4K);
i++;
}
+};
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -1848,6 +1848,7 @@ static const struct spi_nor_manufacturer
+@@ -1857,6 +1857,7 @@ static const struct spi_nor_manufacturer
&spi_nor_winbond,
&spi_nor_xilinx,
&spi_nor_xmc,
#endif /* __LINUX_USB_PCI_QUIRKS_H */
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
-@@ -495,7 +495,14 @@ extern int usb_hcd_pci_probe(struct pci_
+@@ -497,7 +497,14 @@ extern int usb_hcd_pci_probe(struct pci_
extern void usb_hcd_pci_remove(struct pci_dev *dev);
extern void usb_hcd_pci_shutdown(struct pci_dev *dev);
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1805,6 +1805,15 @@ config EMBEDDED
+@@ -1810,6 +1810,15 @@ config EMBEDDED
an embedded system so certain expert options are available
for configuration.
+++ /dev/null
---- a/arch/arm/mach-mediatek/Kconfig
-+++ b/arch/arm/mach-mediatek/Kconfig
-@@ -30,6 +30,7 @@ config MACH_MT7623
- config MACH_MT7629
- bool "MediaTek MT7629 SoCs support"
- default ARCH_MEDIATEK
-+ select HAVE_ARM_ARCH_TIMER
-
- config MACH_MT8127
- bool "MediaTek MT8127 SoCs support"
struct mtk_pcie_port;
/**
-@@ -1053,6 +1059,27 @@ static int mtk_pcie_setup(struct mtk_pci
+@@ -1054,6 +1060,27 @@ static int mtk_pcie_setup(struct mtk_pci
struct mtk_pcie_port *port, *tmp;
int err, slot;
+};
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -1832,6 +1832,7 @@ int spi_nor_sr2_bit7_quad_enable(struct
+@@ -1841,6 +1841,7 @@ int spi_nor_sr2_bit7_quad_enable(struct
static const struct spi_nor_manufacturer *manufacturers[] = {
&spi_nor_atmel,
projects / openwrt / staging / ansuel.git / commitdiff