x86/MCE: Cleanup and complete struct mce fields definitions

The struct is part of the uapi, document that fact and all fields properly
and fix formatting.

No functional changes.

Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20180306142143.19990-3-bp@alien8.de

diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 435db58a7badec77e38e3d9e7f6ead5954efc4cc..955c2a2e1cf9d24a458f765c18db9e9f68b335ee 100644 (file)
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -5,32 +5,36 @@
 #include <linux/types.h>
 #include <linux/ioctl.h>
 
-/* Fields are zero when not available */
+/*
+ * Fields are zero when not available. Also, this struct is shared with
+ * userspace mcelog and thus must keep existing fields at current offsets.
+ * Only add new fields to the end of the structure
+ */
 struct mce {
-       __u64 status;
-       __u64 misc;
-       __u64 addr;
-       __u64 mcgstatus;
-       __u64 ip;
-       __u64 tsc;      /* cpu time stamp counter */
-       __u64 time;     /* wall time_t when error was detected */
-       __u8  cpuvendor;        /* cpu vendor as encoded in system.h */
-       __u8  inject_flags;     /* software inject flags */
-       __u8  severity;
+       __u64 status;           /* Bank's MCi_STATUS MSR */
+       __u64 misc;             /* Bank's MCi_MISC MSR */
+       __u64 addr;             /* Bank's MCi_ADDR MSR */
+       __u64 mcgstatus;        /* Machine Check Global Status MSR */
+       __u64 ip;               /* Instruction Pointer when the error happened */
+       __u64 tsc;              /* CPU time stamp counter */
+       __u64 time;             /* Wall time_t when error was detected */
+       __u8  cpuvendor;        /* Kernel's X86_VENDOR enum */
+       __u8  inject_flags;     /* Software inject flags */
+       __u8  severity;         /* Error severity */
        __u8  pad;
-       __u32 cpuid;    /* CPUID 1 EAX */
-       __u8  cs;               /* code segment */
-       __u8  bank;     /* machine check bank */
-       __u8  cpu;      /* cpu number; obsolete; use extcpu now */
-       __u8  finished;   /* entry is valid */
-       __u32 extcpu;   /* linux cpu number that detected the error */
-       __u32 socketid; /* CPU socket ID */
-       __u32 apicid;   /* CPU initial apic ID */
-       __u64 mcgcap;   /* MCGCAP MSR: machine check capabilities of CPU */
-       __u64 synd;     /* MCA_SYND MSR: only valid on SMCA systems */
-       __u64 ipid;     /* MCA_IPID MSR: only valid on SMCA systems */
-       __u64 ppin;     /* Protected Processor Inventory Number */
-       __u32 microcode;/* Microcode revision */
+       __u32 cpuid;            /* CPUID 1 EAX */
+       __u8  cs;               /* Code segment */
+       __u8  bank;             /* Machine check bank reporting the error */
+       __u8  cpu;              /* CPU number; obsoleted by extcpu */
+       __u8  finished;         /* Entry is valid */
+       __u32 extcpu;           /* Linux CPU number that detected the error */
+       __u32 socketid;         /* CPU socket ID */
+       __u32 apicid;           /* CPU initial APIC ID */
+       __u64 mcgcap;           /* MCGCAP MSR: machine check capabilities of CPU */
+       __u64 synd;             /* MCA_SYND MSR: only valid on SMCA systems */
+       __u64 ipid;             /* MCA_IPID MSR: only valid on SMCA systems */
+       __u64 ppin;             /* Protected Processor Inventory Number */
+       __u32 microcode;        /* Microcode revision */
 };
 
 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)