OMAPDSS: Add interlace parameter to omap_video_timings
authorArchit Taneja <archit@ti.com>
Thu, 28 Jun 2012 05:45:51 +0000 (11:15 +0530)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Fri, 29 Jun 2012 07:15:52 +0000 (10:15 +0300)
Add a parameter called interlace which tells whether the timings are in
interlaced or progressive mode. This aligns the omap_video_timings struct with
the Xorg modeline configuration.

It also removes the hack needed to write to divide the manager height by 2 if
the connected interface is VENC.

Signed-off-by: Archit Taneja <archit@ti.com>
drivers/video/omap2/dss/dispc.c
drivers/video/omap2/dss/hdmi_panel.c
drivers/video/omap2/dss/venc.c
include/video/omapdss.h

index 957c049627933ef966afb833f725816cbb0d6ec3..d200f446840fd5375b76c8c9fdb980e06853c048 100644 (file)
@@ -2754,11 +2754,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
 
                DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
        } else {
-               enum dss_hdmi_venc_clk_source_select source;
-
-               source = dss_get_hdmi_venc_clk_source();
-
-               if (source == DSS_VENC_TV_CLK)
+               if (t.interlace == true)
                        t.y_res /= 2;
        }
 
index 723a1378847655ef8460885c65211552a4c90af6..e10844faadf91434df1c096aaf0e3dd5cc5e88d0 100644 (file)
@@ -46,6 +46,7 @@ static int hdmi_panel_probe(struct omap_dss_device *dssdev)
        dssdev->panel.timings = (struct omap_video_timings)
                        { 640, 480, 25175, 96, 16, 48, 2, 11, 31,
                                OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
+                               false,
                        };
 
        DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n",
index 416d478803e5ac6ae4ae30b91278062ee02bb1af..3a220877461ac9adbf3ab62369e9d10a7476a952 100644 (file)
@@ -272,6 +272,8 @@ const struct omap_video_timings omap_dss_pal_timings = {
        .vsw            = 5,
        .vfp            = 5,
        .vbp            = 41,
+
+       .interlace      = true,
 };
 EXPORT_SYMBOL(omap_dss_pal_timings);
 
@@ -285,6 +287,8 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
        .vsw            = 6,
        .vfp            = 6,
        .vbp            = 31,
+
+       .interlace      = true,
 };
 EXPORT_SYMBOL(omap_dss_ntsc_timings);
 
index 14f261b584fa798d9127abfdaaaae7c980365f20..d8ab94485c97e224438b95abaed61943a671722c 100644 (file)
@@ -344,6 +344,8 @@ struct omap_video_timings {
        enum omap_dss_signal_level vsync_level;
        /* Hsync logic level */
        enum omap_dss_signal_level hsync_level;
+       /* Interlaced or Progressive timings */
+       bool interlace;
        /* Pixel clock edge to drive LCD data */
        enum omap_dss_signal_edge data_pclk_edge;
        /* Data enable logic level */