#define _GTA02_H
#include <mach/regs-gpio.h>
+#include <mach/gpio.h>
#include <mach/irqs.h>
/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
#define GTA02_PCB_ID2_0 S3C2410_GPD3
#define GTA02_PCB_ID2_1 S3C2410_GPD4
+#define GTA02_GPIO_GLAMO_BASE S3C_GPIO_END
+#define GTA02_GPIO_GLAMO(x) (GTA02_GPIO_GLAMO_BASE + x)
+
int gta02_get_pcb_revision(void);
extern struct pcf50633 *gta02_pcf;
#include <linux/platform_device.h>
#include <linux/serial_core.h>
#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/mmc/host.h>
#include <mach/spi.h>
#include <mach/spi-gpio.h>
#include <mach/regs-mem.h>
-#include <mach/spi-gpio.h>
#include <plat/pwm.h>
#include <mach/cpu.h>
#include <linux/jbt6k74.h>
#include <linux/glamofb.h>
#include <linux/mfd/glamo.h>
-#include <linux/spi/glamo.h>
#include <linux/hdq.h>
#include <linux/bq27000_battery.h>
static void gta02_jbt6k74_reset(int devidx, int level)
{
- glamo_lcm_reset(>a02_glamo_dev, level);
+ gpio_set_value(GTA02_GPIO_GLAMO(4), level);
}
static void gta02_jbt6k74_probe_completed(struct device *dev)
static struct spi_board_info gta02_spi_board_info[] = {
{
.modalias = "jbt6k74",
- /* platform_data */
.platform_data = &jbt6k74_pdata,
- /* controller_data */
+ .controller_data = (void*)GTA02_GPIO_GLAMO(12),
/* irq */
.max_speed_hz = 100 * 1000,
.bus_num = 2,
- /* chip_select */
+ .chip_select = 0
},
{
.modalias = "lis302dl",
s3c2410_gpio_cfgpin(GTA02_GPIO_3D_RESET, S3C2410_GPIO_OUTPUT);
}
+/*
+static struct fb_videomode gta02_glamo_modes[] = {
+ {
+ .name = "480x640",
+ .xres = 480,
+ .yres = 640,
+ .pixclock = 40816,
+ .left_margin = 8,
+ .right_margin = 63,
+ .upper_margin = 2,
+ .lower_margin = 4,
+ .hsync_len = 8,
+ .vsync_len = 2,
+ .vmode = FB_VMODE_NONINTERLACED,
+ }, {
+ .name = "240x320",
+ .xres = 240,
+ .yres = 320,
+ .pixclock = 40816,
+ .left_margin = 8,
+ .right_margin = 88,
+ .upper_margin = 2,
+ .lower_margin = 2,
+ .hsync_len = 8,
+ .vsync_len = 2,
+ .vmode = FB_VMODE_NONINTERLACED,
+ }
+};*/
+
static struct fb_videomode gta02_glamo_modes[] = {
{
.name = "480x640",
}
};
+
static struct glamo_fb_platform_data gta02_glamo_fb_pdata = {
.width = 43,
.height = 58,
.modes = gta02_glamo_modes,
};
-static struct glamo_spigpio_platform_data gta02_glamo_spigpio_pdata = {
- .pin_clk = GLAMO_GPIO10_OUTPUT,
- .pin_mosi = GLAMO_GPIO11_OUTPUT,
- .pin_cs = GLAMO_GPIO12_OUTPUT,
- .pin_miso = 0,
- .bus_num = 2,
-};
-
static struct glamo_mmc_platform_data gta02_glamo_mmc_pdata = {
.glamo_mmc_use_slow = gta02_glamo_mci_use_slow,
};
static struct glamo_platform_data gta02_glamo_pdata = {
- .fb_data = >a02_glamo_fb_pdata,
- .spigpio_data = >a02_glamo_spigpio_pdata,
- .mmc_data = >a02_glamo_mmc_pdata,
+ .fb_data = >a02_glamo_fb_pdata,
+ .mmc_data = >a02_glamo_mmc_pdata,
+ .gpio_base = GTA02_GPIO_GLAMO_BASE,
.osci_clock_rate = 32768,
}
}
+struct spi_gpio_platform_data spigpio_platform_data = {
+ .sck = GTA02_GPIO_GLAMO(10),
+ .mosi = GTA02_GPIO_GLAMO(11),
+ .miso = GTA02_GPIO_GLAMO(5),
+ .num_chipselect = 1,
+};
+
+static struct platform_device spigpio_device = {
+ .name = "spi_gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &spigpio_platform_data,
+ .parent = >a02_glamo_dev.dev,
+ },
+};
+
static void __init gta02_map_io(void)
{
s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
&s3c24xx_pwm_device,
>a02_led_dev,
>a02_pm_wlan_dev, /* not dependent on PMU */
-
&s3c_device_iis,
&s3c_device_i2c0,
};
>a02_resume_reason_device,
};
+static void gta02_register_glamo() {
+ platform_device_register(>a02_glamo_dev);
+ if (!gpio_request(GTA02_GPIO_GLAMO(4), "jbt6k74 reset"))
+ printk("gta02: Failed to request jbt6k74 reset pin\n");
+ if (!gpio_direction_output(GTA02_GPIO_GLAMO(4), 1))
+ printk("gta02: Failed to configure jbt6k74 reset pin\n");
+ platform_device_register(&spigpio_device);
+}
+
static void gta02_pmu_regulator_registered(struct pcf50633 *pcf, int id)
{
struct platform_device *regulator, *pdev;
pdev = >a02_pm_gps_dev;
break;
case PCF50633_REGULATOR_HCLDO:
- pdev = >a02_glamo_dev;
- break;
+ gta02_register_glamo();
+ return;
default:
return;
}
s3c2410_gpio_setpin(S3C2410_GPD13, 1);
s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPIO_OUTPUT);
+
s3c24xx_udc_set_platdata(>a02_udc_cfg);
s3c_i2c0_set_platdata(NULL);
set_s3c2410ts_info(>a02_ts_cfg);
-
+
mangle_glamo_res_by_system_rev();
i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs));
If unsure, say N.
-config MFD_GLAMO_FB_XGLAMO_WORKAROUND
- bool "Smedia Glamo 336x/337x Xglamo rotation workaround"
- depends on MFD_GLAMO_FB
- help
- This is a workaround for a Xglamo bug. This should be fixed
- in Xglamo and not in kernel space.
-
- If unsure, say N.
-
-
-config MFD_GLAMO_SPI_GPIO
- tristate "Glamo GPIO SPI bitbang support"
+config MFD_GLAMO_GPIO
+ tristate "Glamo GPIO support"
depends on MFD_GLAMO
- select SPI_BITBANG
help
- Enable a bitbanging SPI adapter driver for the Smedia Glamo.
+ Enable a bitbanging SPI adapter driver for the Smedia Glamo.
config MFD_GLAMO_MCI
tristate "Glamo S3C SD/MMC Card Interface support"
# Makefile for the Smedia Glamo framebuffer driver
#
-obj-$(CONFIG_MFD_GLAMO) += glamo-core.o glamo-gpio.o
+obj-$(CONFIG_MFD_GLAMO) += glamo-core.o
+obj-$(CONFIG_MFD_GLAMO_GPIO) += glamo-gpio.o
obj-$(CONFIG_MFD_GLAMO_SPI) += glamo-spi.o
-obj-$(CONFIG_MFD_GLAMO_SPI_GPIO) += glamo-spi-gpio.o
obj-$(CONFIG_MFD_GLAMO_FB) += glamo-fb.o
obj-$(CONFIG_MFD_GLAMO_MCI) += glamo-mci.o
/* { 0x1500, 0x080, "MPU 0", 0 },
{ 0x1580, 0x080, "MPU 1", 0 },
{ 0x1600, 0x080, "Cmd Queue", 0 },
- { 0x1680, 0x080, "RISC CPU", 0 },
+ { 0x1680, 0x080, "RISC CPU", 0 },*/
{ 0x1700, 0x400, "2D Unit", 0 },
- { 0x1b00, 0x900, "3D Unit", 0 }, */
+/* { 0x1b00, 0x900, "3D Unit", 0 }, */
};
static inline void __reg_write(struct glamo_core *glamo,
enum glamo_cells {
GLAMO_CELL_FB,
GLAMO_CELL_MMC,
- GLAMO_CELL_SPI_GPIO
+ GLAMO_CELL_GPIO,
};
static struct mfd_cell glamo_cells[] = {
.num_resources = ARRAY_SIZE(glamo_mmc_resources),
.resources = glamo_mmc_resources,
},
- [GLAMO_CELL_SPI_GPIO] = {
- .name = "glamo-spi-gpio",
+ [GLAMO_CELL_GPIO] = {
+ .name = "glamo-gpio",
},
};
GLAMO_CLOCK_MMC_EN_M9CLK |
GLAMO_CLOCK_MMC_EN_TCLK |
GLAMO_CLOCK_MMC_DG_M9CLK |
- GLAMO_CLOCK_MMC_DG_TCLK, 0xffff);
+ GLAMO_CLOCK_MMC_DG_TCLK,
+ 0xffff);
/* enable the TCLK divider clk input */
__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine)
{
- uint16_t reg = reset_regs[engine].reg;
- uint16_t val = reset_regs[engine].val;
+ uint16_t reg = reset_regs[engine].reg;
+ uint16_t val = reset_regs[engine].val;
if (engine >= ARRAY_SIZE(reset_regs)) {
dev_warn(&glamo->pdev->dev, "unknown engine %u ", engine);
}
EXPORT_SYMBOL_GPL(glamo_engine_reset);
-void glamo_lcm_reset(struct platform_device *pdev, int level)
-{
- struct glamo_core *glamo = dev_get_drvdata(&pdev->dev);
- if (!glamo)
- return;
-
- glamo_gpio_setpin(glamo, GLAMO_GPIO4, level);
- glamo_gpio_cfgpin(glamo, GLAMO_GPIO4_OUTPUT);
-}
-EXPORT_SYMBOL_GPL(glamo_lcm_reset);
-
int glamo_pll_rate(struct glamo_core *glamo,
enum glamo_pll pll)
{
int len, int may_sleep)
{
int i;
+ const struct glamo_script *line = script;
- for (i = 0; i < len; i++) {
- struct glamo_script *line = &script[i];
-
+ for (i = 0; i < len; ++i, ++line) {
switch (line->reg) {
case 0xffff:
return 0;
{ GLAMO_REG_MEM_DRAM1, 0xe100 },
{ GLAMO_REG_MEM_DRAM2, 0x01d6 },
{ GLAMO_REG_CLOCK_MEMORY, 0x000b },
- { GLAMO_REG_GPIO_GEN1, 0x000f },
- { GLAMO_REG_GPIO_GEN2, 0x111e },
- { GLAMO_REG_GPIO_GEN3, 0xccc3 },
- { GLAMO_REG_GPIO_GEN4, 0x111e },
- { GLAMO_REG_GPIO_GEN5, 0x000f },
};
#if 0
static struct glamo_script glamo_resume_script[] = {
glamo_cells[GLAMO_CELL_FB].platform_data = glamo->pdata->fb_data;
glamo_cells[GLAMO_CELL_FB].data_size = sizeof(struct glamo_fb_platform_data);
- glamo->pdata->spigpio_data->core = glamo;
- glamo_cells[GLAMO_CELL_SPI_GPIO].platform_data =
- glamo->pdata->spigpio_data;
- glamo_cells[GLAMO_CELL_SPI_GPIO].data_size =
- sizeof(struct glamo_spigpio_platform_data);
-
mfd_add_devices(&pdev->dev, pdev->id, glamo_cells,
ARRAY_SIZE(glamo_cells),
glamo->mem, 0);
struct glamo_core *glamo = dev_get_drvdata(dev);
glamo_power(glamo, GLAMO_POWER_ON);
glamo->suspending = 0;
-
return 0;
}
+++ /dev/null
-/*
- * Copyright (C) 2007 Openmoko, Inc.
- * Author: Harald Welte <laforge@openmoko.org>
- *
- * Smedia Glamo GPIO based SPI driver
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This driver currently only implements a minimum subset of the hardware
- * features, esp. those features that are required to drive the jbt6k74
- * LCM controller asic in the TD028TTEC1 LCM.
- *
-*/
-
-#define DEBUG
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/spinlock.h>
-#include <linux/platform_device.h>
-
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_bitbang.h>
-#include <linux/spi/glamo.h>
-
-#include <linux/glamofb.h>
-
-#include <mach/hardware.h>
-
-#include "glamo-core.h"
-#include "glamo-regs.h"
-
-struct glamo_spigpio {
- struct spi_bitbang bitbang;
- struct spi_master *master;
- struct glamo_spigpio_platform_data *info;
-};
-
-static inline struct glamo_spigpio *to_sg(struct spi_device *spi)
-{
- return dev_get_drvdata(&spi->master->dev);
-}
-
-static inline void setsck(struct spi_device *dev, int on)
-{
- struct glamo_spigpio *sg = to_sg(dev);
- glamo_gpio_setpin(sg->info->core, sg->info->pin_clk, on ? 1 : 0);
-}
-
-static inline void setmosi(struct spi_device *dev, int on)
-{
- struct glamo_spigpio *sg = to_sg(dev);
- glamo_gpio_setpin(sg->info->core, sg->info->pin_mosi, on ? 1 : 0);
-}
-
-static inline u32 getmiso(struct spi_device *dev)
-{
- struct glamo_spigpio *sg = to_sg(dev);
- if (sg->info->pin_miso)
- return glamo_gpio_getpin(sg->info->core, sg->info->pin_miso) ? 1 : 0;
- else
- return 0;
-}
-
-#define spidelay(x) ndelay(x)
-
-#define EXPAND_BITBANG_TXRX
-#include <linux/spi/spi_bitbang.h>
-
-static u32 glamo_spigpio_txrx_mode0(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
-}
-
-static u32 glamo_spigpio_txrx_mode1(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
-}
-
-static u32 glamo_spigpio_txrx_mode2(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
-}
-
-static u32 glamo_spigpio_txrx_mode3(struct spi_device *spi,
- unsigned nsecs, u32 word, u8 bits)
-{
- return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
-}
-
-
-#if 0
-static int glamo_spigpio_setupxfer(struct spi_device *spi,
- struct spi_transfer *t)
-{
- struct glamo_spi *gs = to_sg(spi);
- unsigned int bpw;
-
- bpw = t ? t->bits_per_word : spi->bits_per_word;
-
- if (bpw != 9 && bpw != 8) {
- dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
- return -EINVAL;
- }
-
- return 0;
-}
-#endif
-
-static void glamo_spigpio_chipsel(struct spi_device *spi, int value)
-{
- struct glamo_spigpio *gs = to_sg(spi);
-#if 0
- dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n",
- value, spi, gs, gs->info, gs->info->glamo);
-#endif
- glamo_gpio_setpin(gs->info->core, gs->info->pin_cs, value ? 0 : 1);
-}
-
-
-static int glamo_spigpio_probe(struct platform_device *pdev)
-{
- struct spi_master *master;
- struct glamo_spigpio *sp;
- int ret;
-
- master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spigpio));
- if (master == NULL) {
- dev_err(&pdev->dev, "failed to allocate spi master\n");
- ret = -ENOMEM;
- goto err;
- }
-
- sp = spi_master_get_devdata(master);
- platform_set_drvdata(pdev, sp);
- sp->info = pdev->dev.platform_data;
- if (!sp->info) {
- dev_err(&pdev->dev, "can't operate without platform data\n");
- ret = -EIO;
- goto err_no_pdev;
- }
-
- master->num_chipselect = 1;
- master->bus_num = 2; /* FIXME: use dynamic number */
-
- sp->master = spi_master_get(master);
-
- sp->bitbang.master = sp->master;
- sp->bitbang.chipselect = glamo_spigpio_chipsel;
- sp->bitbang.txrx_word[SPI_MODE_0] = glamo_spigpio_txrx_mode0;
- sp->bitbang.txrx_word[SPI_MODE_1] = glamo_spigpio_txrx_mode1;
- sp->bitbang.txrx_word[SPI_MODE_2] = glamo_spigpio_txrx_mode2;
- sp->bitbang.txrx_word[SPI_MODE_3] = glamo_spigpio_txrx_mode3;
-
- /* set state of spi pins */
- glamo_gpio_setpin(sp->info->core, sp->info->pin_clk, 0);
- glamo_gpio_setpin(sp->info->core, sp->info->pin_mosi, 0);
- glamo_gpio_setpin(sp->info->core, sp->info->pin_cs, 1);
-
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_clk);
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_mosi);
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_cs);
- if (sp->info->pin_miso)
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_miso);
-
- /* bring the LCM panel out of reset if it isn't already */
-
- glamo_gpio_setpin(sp->info->core, GLAMO_GPIO4, 1);
- glamo_gpio_cfgpin(sp->info->core, GLAMO_GPIO4_OUTPUT);
- msleep(90);
-
-#if 0
- sp->dev = &pdev->dev;
-
- sp->bitbang.setup_transfer = glamo_spi_setupxfer;
- sp->bitbang.txrx_bufs = glamo_spi_txrx;
- sp->bitbang.master->setup = glamo_spi_setup;
-#endif
-
- dev_set_drvdata(&sp->master->dev, sp);
-
- ret = spi_bitbang_start(&sp->bitbang);
- if (ret)
- goto err_no_bitbang;
-
- return 0;
-
-err_no_bitbang:
- platform_set_drvdata(pdev, NULL);
-err_no_pdev:
- spi_master_put(sp->bitbang.master);
-err:
- return ret;
-
-}
-
-static int glamo_spigpio_remove(struct platform_device *pdev)
-{
- struct glamo_spigpio *sp = platform_get_drvdata(pdev);
-
- spi_bitbang_stop(&sp->bitbang);
- spi_master_put(sp->bitbang.master);
-
- return 0;
-}
-
-
-#ifdef CONFIG_PM
-/*static int glamo_spigpio_suspend(struct device *dev)
-{
- return 0;
-}*/
-
-static int glamo_spigpio_resume(struct device *dev)
-{
- struct glamo_spigpio *sp = dev_get_drvdata(dev);
-
- if (!sp)
- return 0;
-
- /* set state of spi pins */
- glamo_gpio_setpin(sp->info->core, sp->info->pin_clk, 0);
- glamo_gpio_setpin(sp->info->core, sp->info->pin_mosi, 0);
- glamo_gpio_setpin(sp->info->core, sp->info->pin_cs, 1);
-
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_clk);
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_mosi);
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_cs);
- if (sp->info->pin_miso)
- glamo_gpio_cfgpin(sp->info->core, sp->info->pin_miso);
-
- return 0;
-}
-
-static struct dev_pm_ops glamo_spigpio_pm_ops = {
-/* .suspend = glamo_spiogpio_suspend,*/
- .resume_noirq = glamo_spigpio_resume,
-};
-
-#define GLAMO_SPIGPIO_PM_OPS (&glamo_spigpio_pm_ops)
-
-#else
-#define GLAMO_SPIGPIO_PM_OPS NULL
-#endif
-
-static struct platform_driver glamo_spi_drv = {
- .probe = glamo_spigpio_probe,
- .remove = glamo_spigpio_remove,
- .driver = {
- .name = "glamo-spi-gpio",
- .owner = THIS_MODULE,
- .pm = GLAMO_SPIGPIO_PM_OPS,
- },
-};
-
-static int __init glamo_spi_init(void)
-{
- return platform_driver_register(&glamo_spi_drv);
-}
-
-static void __exit glamo_spi_exit(void)
-{
- platform_driver_unregister(&glamo_spi_drv);
-}
-
-module_init(glamo_spi_init);
-module_exit(glamo_spi_exit);
-
-MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver");
-MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>")
-MODULE_LICENSE("GPL");
+++ /dev/null
-#ifndef __GLAMO_GPIO_H
-#define __GLAMO_GPIO_H
-
-struct glamo_core;
-
-#define GLAMO_GPIO_BANKA 0x0000
-#define GLAMO_GPIO_BANKB 0x1000
-#define GLAMO_GPIO_BANKC 0x2000
-#define GLAMO_GPIO_BANKD 0x3000
-
-#define GLAMO_GPIONO(bank, pin) ((bank & 0xf000) | ((pin & 0xf) << 8))
-
-#define GLAMO_GPIO_F_IN 0x0010
-#define GLAMO_GPIO_F_OUT 0x0020
-#define GLAMO_GPIO_F_FUNC 0x0030
-
-#define GLAMO_GPIO0 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 0)
-#define GLAMO_GPIO0_INPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO0_OUTPUT (GLAMO_GPIO0 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO0_HA20 (GLAMO_GPIO0 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO1 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 1)
-#define GLAMO_GPIO1_INPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO1_OUTPUT (GLAMO_GPIO1 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO1_HA21 (GLAMO_GPIO1 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO2 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 2)
-#define GLAMO_GPIO2_INPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO2_OUTPUT (GLAMO_GPIO2 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO2_HA22 (GLAMO_GPIO2 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO3 GLAMO_GPIONO(GLAMO_GPIO_BANKA, 3)
-#define GLAMO_GPIO3_INPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO3_OUTPUT (GLAMO_GPIO3 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO3_HA23 (GLAMO_GPIO3 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO4 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 0)
-#define GLAMO_GPIO4_INPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO4_OUTPUT (GLAMO_GPIO4 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO4_nLCS0 (GLAMO_GPIO4 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO5 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 1)
-#define GLAMO_GPIO5_INPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO5_OUTPUT (GLAMO_GPIO5 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO5_nLCS1 (GLAMO_GPIO5 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO6 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 2)
-#define GLAMO_GPIO6_INPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO6_OUTPUT (GLAMO_GPIO6 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO6_LDCLK (GLAMO_GPIO6 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO7 GLAMO_GPIONO(GLAMO_GPIO_BANKB, 3)
-#define GLAMO_GPIO7_INPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO7_OUTPUT (GLAMO_GPIO7 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO7_nLDE (GLAMO_GPIO7 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO8 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 0)
-#define GLAMO_GPIO8_INPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO8_OUTPUT (GLAMO_GPIO8 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO8_LD16 (GLAMO_GPIO8 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO9 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 1)
-#define GLAMO_GPIO9_INPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO9_OUTPUT (GLAMO_GPIO9 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO9_LD17 (GLAMO_GPIO9 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO10 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 2)
-#define GLAMO_GPIO10_INPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO10_OUTPUT (GLAMO_GPIO10 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO10_LSCK (GLAMO_GPIO10 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO11 GLAMO_GPIONO(GLAMO_GPIO_BANKC, 3)
-#define GLAMO_GPIO11_INPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO11_OUTPUT (GLAMO_GPIO11 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO11_LSDA (GLAMO_GPIO11 | GLAMO_GPIO_F_FUNC)
-
-#define GLAMO_GPIO12 GLAMO_GPIONO(GLAMO_GPIO_BANKD, 0)
-#define GLAMO_GPIO12_INPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_IN)
-#define GLAMO_GPIO12_OUTPUT (GLAMO_GPIO12 | GLAMO_GPIO_F_OUT)
-#define GLAMO_GPIO12_LSA0 (GLAMO_GPIO12 | GLAMO_GPIO_F_FUNC)
-
-
-#define REG_OF_GPIO(gpio) (((gpio & 0xf000) >> 12)*2 \
- + GLAMO_REG_GPIO_GEN1)
-#define NUM_OF_GPIO(gpio) ((gpio & 0x0f00) >> 8)
-#define GPIO_OUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 0))
-#define OUTPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 4))
-#define INPUT_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 8))
-#define FUNC_BIT(gpio) (1 << (NUM_OF_GPIO(gpio) + 12))
-
-void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin,
- unsigned int value);
-
-int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin);
-
-void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc);
-
-
-#endif /* _GLAMO_GPIO */
struct glamo_fb_platform_data *fb_data;
struct glamo_spigpio_platform_data *spigpio_data;
struct glamo_mmc_platform_data *mmc_data;
+ int gpio_base;
unsigned int osci_clock_rate;
+++ /dev/null
-#ifndef __GLAMO_SPI_H
-#define __GLAMO_SPI_H
-
-#include <linux/glamo-gpio.h>
-
-struct glamo_core;
-
-struct glamo_spigpio_platform_data {
- unsigned int pin_clk;
- unsigned int pin_mosi;
- unsigned int pin_miso;
- unsigned int pin_cs;
- int bus_num;
-
- struct glamo_core *core;
-};
-
-
-#endif
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include <plat/regs-iis.h>
#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-#include <mach/hardware.h>
#include <asm/io.h>
#include <mach/regs-gpioj.h>
#include <mach/gta02.h>
if (val) {
lm4853_state |= LM4853_SPK;
- s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 0);
+ gpio_set_value(GTA02_GPIO_HP_IN, 0);
} else {
lm4853_state &= ~LM4853_SPK;
- s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 1);
+ gpio_set_value(GTA02_GPIO_HP_IN, 1);
}
return 0;
int event)
{
if (SND_SOC_DAPM_EVENT_ON(event))
- s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 0);
+ gpio_set_value(GTA02_GPIO_AMP_SHUT, 0);
if (SND_SOC_DAPM_EVENT_OFF(event))
- s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
+ gpio_set_value(GTA02_GPIO_AMP_SHUT, 1);
return 0;
}
if (ret) {
platform_device_put(neo1973_gta02_snd_device);
- return ret;
+ return 0;
}
/* Initialise GPIOs used by amp */
- s3c2410_gpio_cfgpin(GTA02_GPIO_HP_IN, S3C2410_GPIO_OUTPUT);
- s3c2410_gpio_cfgpin(GTA02_GPIO_AMP_SHUT, S3C2410_GPIO_OUTPUT);
+ ret = gpio_request(GTA02_GPIO_HP_IN, "GTA02_HP_IN");
+ if (ret) {
+ pr_err("%s: Failed to register GPIO %d\n", __func__, GTA02_GPIO_HP_IN);
+ goto err_unregister_device;
+ }
- /* Amp off by default */
- s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
+ ret = gpio_direction_output(GTA02_GPIO_HP_IN, 1);
+ if (ret) {
+ pr_err("%s: Failed to configure GPIO %d\n", __func__, GTA02_GPIO_HP_IN);
+ goto err_unregister_device;
+ }
- /* Speaker off by default */
- s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 1);
+ ret = gpio_request(GTA02_GPIO_AMP_SHUT, "GTA02_AMP_SHUT");
+ if (ret) {
+ pr_err("%s: Failed to register GPIO %d\n", __func__, GTA02_GPIO_AMP_SHUT);
+ goto err_free_gpio_hp_in;
+ }
+ ret = gpio_direction_output(GTA02_GPIO_AMP_SHUT, 1);
+ if (ret) {
+ pr_err("%s: Failed to configure GPIO %d\n", __func__, GTA02_GPIO_AMP_SHUT);
+ goto err_free_gpio_hp_in;
+ }
+
+
+ return 0;
+err_free_gpio_hp_in:
+ gpio_free(GTA02_GPIO_HP_IN);
+err_unregister_device:
+ platform_device_unregister(neo1973_gta02_snd_device);
return ret;
}
module_init(neo1973_gta02_init);
{
snd_soc_unregister_dai(&bt_dai);
platform_device_unregister(neo1973_gta02_snd_device);
+ gpio_free(GTA02_GPIO_HP_IN);
+ gpio_free(GTA02_GPIO_AMP_SHUT);
}
module_exit(neo1973_gta02_exit);