+++ /dev/null
-From e05fdd93645dab2217bb5bfabcc04845415cf7ed Mon Sep 17 00:00:00 2001
-From: David Woodhouse <dwmw2@infradead.org>
-Date: Fri, 19 Jun 2020 12:40:20 +0100
-Subject: [PATCH] pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
-
-The pins for the MMC controller weren't being set up correctly because the
-pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
-handle the special cases with PUPD/R0/R1 control.
-
-Signed-off-by: David Woodhouse <dwmw2@infradead.org>
-Tested-by: Frank Wunderlich <frank-w@public-files.de>
----
- drivers/pinctrl/mediatek/pinctrl-mt7623.c | 129 ++++++++++++++++++
- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 19 ++-
- drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 3 +
- 3 files changed, 146 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
-index d58d840e08..0f5dcb2c63 100644
---- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
-+++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
-@@ -262,6 +262,132 @@ static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = {
- PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4),
- };
-
-+static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = {
-+ /* MSDC0 */
-+ PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1),
-+ PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1),
-+ PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1),
-+ PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1),
-+ PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
-+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1),
-+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1),
-+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1),
-+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1),
-+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1),
-+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1),
-+ /* MSDC1 */
-+ PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1),
-+ PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1),
-+ PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1),
-+ PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1),
-+ PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1),
-+ PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1),
-+ /* MSDC1 */
-+ PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1),
-+ PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1),
-+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1),
-+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1),
-+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1),
-+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1),
-+ /* MSDC0E */
-+ PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1),
-+ PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
-+ PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1),
-+ PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1),
-+ PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1),
-+ PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1),
-+ PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1),
-+ PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1),
-+ PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1),
-+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1),
-+ PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
-+ PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1),
-+};
-+
-+static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = {
-+ /* MSDC0 */
-+ PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1),
-+ PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1),
-+ PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1),
-+ PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1),
-+ PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
-+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1),
-+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1),
-+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1),
-+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1),
-+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1),
-+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1),
-+ /* MSDC1 */
-+ PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1),
-+ PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1),
-+ PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1),
-+ PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1),
-+ PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1),
-+ PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1),
-+ /* MSDC2 */
-+ PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1),
-+ PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1),
-+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1),
-+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1),
-+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1),
-+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1),
-+ /* MSDC0E */
-+ PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1),
-+ PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
-+ PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1),
-+ PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1),
-+ PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1),
-+ PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1),
-+ PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1),
-+ PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1),
-+ PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1),
-+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1),
-+ PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
-+ PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1),
-+};
-+
-+static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = {
-+ /* MSDC0 */
-+ PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1),
-+ PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1),
-+ PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1),
-+ PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1),
-+ PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
-+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1),
-+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1),
-+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1),
-+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1),
-+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1),
-+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1),
-+ /* MSDC1 */
-+ PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1),
-+ PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1),
-+ PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1),
-+ PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1),
-+ PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1),
-+ PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1),
-+ /* MSDC2 */
-+ PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1),
-+ PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1),
-+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1),
-+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1),
-+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1),
-+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1),
-+ /* MSDC0E */
-+ PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1),
-+ PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1),
-+ PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1),
-+ PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1),
-+ PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1),
-+ PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1),
-+ PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1),
-+ PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1),
-+ PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1),
-+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1),
-+ PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
-+ PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1),
-+};
-+
- static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
- [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range),
- [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range),
-@@ -272,6 +398,9 @@ static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
- [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range),
- [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range),
- [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range),
-+ [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range),
-+ [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range),
-+ [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range),
- };
-
- static const struct mtk_pin_desc mt7623_pins[] = {
-diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
-index e8187a3780..6553dde45c 100644
---- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
-+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
-@@ -296,7 +296,7 @@ static const struct pinconf_param mtk_conf_params[] = {
- };
-
-
--int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
-+int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg, u32 val)
- {
- int err, disable, pullup;
-
-@@ -323,12 +323,14 @@ int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
- return 0;
- }
-
--int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
-+int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg, u32 val)
- {
-- int err, disable, pullup;
-+ int err, disable, pullup, r0, r1;
-
- disable = (arg == PIN_CONFIG_BIAS_DISABLE);
- pullup = (arg == PIN_CONFIG_BIAS_PULL_UP);
-+ r0 = !!(val & 1);
-+ r1 = !!(val & 2);
-
- if (disable) {
- err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PULLEN, 0);
-@@ -344,6 +346,13 @@ int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
- return err;
- }
-
-+ /* Also set PUPD/R0/R1 if the pin has them */
-+ err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
-+ if (err != -EINVAL) {
-+ mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
-+ mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
-+ }
-+
- return 0;
- }
-
-@@ -419,9 +428,9 @@ static int mtk_pinconf_set(struct udevice *dev, unsigned int pin,
- case PIN_CONFIG_BIAS_PULL_UP:
- case PIN_CONFIG_BIAS_PULL_DOWN:
- if (rev == MTK_PINCTRL_V0)
-- err = mtk_pinconf_bias_set_v0(dev, pin, param);
-+ err = mtk_pinconf_bias_set_v0(dev, pin, param, arg);
- else
-- err = mtk_pinconf_bias_set_v1(dev, pin, param);
-+ err = mtk_pinconf_bias_set_v1(dev, pin, param, arg);
- if (err)
- goto err;
- break;
-diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
-index e815761450..5e51a9a90c 100644
---- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
-+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
-@@ -51,6 +51,9 @@ enum {
- PINCTRL_PIN_REG_PULLEN,
- PINCTRL_PIN_REG_PULLSEL,
- PINCTRL_PIN_REG_DRV,
-+ PINCTRL_PIN_REG_PUPD,
-+ PINCTRL_PIN_REG_R0,
-+ PINCTRL_PIN_REG_R1,
- PINCTRL_PIN_REG_MAX,
- };
-
---
-2.26.2
-
+++ /dev/null
-From 3fad1ca28d4c87346d18b89438bf2084fb2c3896 Mon Sep 17 00:00:00 2001
-From: David Woodhouse <dwmw2@infradead.org>
-Date: Sun, 12 Jul 2020 23:33:03 +0100
-Subject: [PATCH 3/3] board: mediatek: Add support for UniElec U7623 board
-
-This is an MT7623A-based board, very similar to the Banana Pi R2.
-
-http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN
-
-Signed-off-by: David Woodhouse <dwmw2@infradead.org>
----
- arch/arm/dts/Makefile | 1 +
- .../arm/dts/mt7623a-unielec-u7623-02-emmc.dts | 211 ++++++++++++++++++
- board/mediatek/mt7623/MAINTAINERS | 7 +
- configs/mt7623a_unielec_u7623_02_defconfig | 54 +++++
- 4 files changed, 273 insertions(+)
- create mode 100644 arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
- create mode 100644 configs/mt7623a_unielec_u7623_02_defconfig
-
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index a3a1e3fbe4..caa7756c5d 100644
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -949,6 +949,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
-
- dtb-$(CONFIG_ARCH_MEDIATEK) += \
- mt7622-rfb.dtb \
-+ mt7623a-unielec-u7623-02-emmc.dtb \
- mt7623n-bananapi-bpi-r2.dtb \
- mt7629-rfb.dtb \
- mt8512-bm1-emmc.dtb \
-diff --git a/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
-new file mode 100644
-index 0000000000..fdeec75b05
---- /dev/null
-+++ b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
-@@ -0,0 +1,211 @@
-+/*
-+ * Copyright (C) 2018 MediaTek Inc.
-+ * Author: Ryder Lee <ryder.lee@mediatek.com>
-+ *
-+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
-+ */
-+
-+/dts-v1/;
-+#include "mt7623.dtsi"
-+#include "mt7623-u-boot.dtsi"
-+
-+/ {
-+ model = "UniElec U7623-02 eMMC";
-+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
-+
-+ memory@80000000 {
-+ device_type = "memory";
-+ reg = <0 0x80000000 0 0x20000000>;
-+ };
-+
-+ chosen {
-+ stdout-path = &uart2;
-+ tick-timer = &timer0;
-+ };
-+
-+ reg_1p8v: regulator-1p8v {
-+ compatible = "regulator-fixed";
-+ regulator-name = "fixed-1.8V";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ reg_3p3v: regulator-3p3v {
-+ compatible = "regulator-fixed";
-+ regulator-name = "fixed-3.3V";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ reg_5v: regulator-5v {
-+ compatible = "regulator-fixed";
-+ regulator-name = "fixed-5V";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led3 {
-+ label = "u7623-01:green:led3";
-+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
-+ default-state = "off";
-+ };
-+
-+ led4 {
-+ label = "u7623-01:green:led4";
-+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
-+ default-state = "off";
-+ };
-+ };
-+};
-+
-+ð {
-+ status = "okay";
-+ mediatek,gmac-id = <0>;
-+ phy-mode = "rgmii";
-+ mediatek,switch = "mt7530";
-+ mediatek,mcm;
-+
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_default>;
-+ status = "okay";
-+ bus-width = <8>;
-+ max-frequency = <50000000>;
-+ cap-mmc-highspeed;
-+ vmmc-supply = <®_3p3v>;
-+ vqmmc-supply = <®_1p8v>;
-+ non-removable;
-+};
-+
-+&pinctrl {
-+ ephy_default: ephy_default {
-+ mux {
-+ function = "eth";
-+ groups = "mdc_mdio", "ephy";
-+ };
-+
-+ conf {
-+ pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
-+ "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
-+ "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
-+ "MDC", "MDIO";
-+ drive-strength = <12>;
-+ mediatek,tdsel = <5>;
-+ };
-+ };
-+
-+ mmc0_pins_default: mmc0default {
-+ mux {
-+ function = "msdc";
-+ groups = "msdc0";
-+ };
-+
-+ conf-cmd-data {
-+ pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
-+ "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
-+ "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
-+ input-enable;
-+ bias-pull-up;
-+ };
-+
-+ conf-clk {
-+ pins = "MSDC0_CLK";
-+ bias-pull-down;
-+ };
-+
-+ conf-rst {
-+ pins = "MSDC0_RSTB";
-+ bias-pull-up;
-+ };
-+ };
-+
-+ pcie_default: pcie-default {
-+ mux {
-+ function = "pcie";
-+ groups = "pcie0_0_perst", "pcie1_0_perst";
-+ };
-+ };
-+
-+ uart0_pins_a: uart0-default {
-+ mux {
-+ function = "uart";
-+ groups = "uart0_0_txd_rxd";
-+ };
-+ };
-+
-+ uart1_pins_a: uart1-default {
-+ mux {
-+ function = "uart";
-+ groups = "uart1_0_txd_rxd";
-+ };
-+ };
-+
-+ uart2_pins_a: uart2-default {
-+ mux {
-+ function = "uart";
-+ groups = "uart2_0_txd_rxd";
-+ };
-+ };
-+
-+ uart2_pins_b: uart2-alt {
-+ mux {
-+ function = "uart";
-+ groups = "uart2_1_txd_rxd";
-+ };
-+ };
-+};
-+
-+&pcie {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pcie_default>;
-+ status = "okay";
-+
-+ pcie@0,0 {
-+ status = "okay";
-+ };
-+
-+ pcie@1,0 {
-+ status = "okay";
-+ };
-+};
-+
-+&pcie0_phy {
-+ status = "okay";
-+};
-+
-+&pcie1_phy {
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart1_pins_a>;
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart2_pins_b>;
-+ status = "okay";
-+};
-diff --git a/board/mediatek/mt7623/MAINTAINERS b/board/mediatek/mt7623/MAINTAINERS
-index eeb0375d70..1a8d796bd3 100644
---- a/board/mediatek/mt7623/MAINTAINERS
-+++ b/board/mediatek/mt7623/MAINTAINERS
-@@ -5,3 +5,10 @@ S: Maintained
- F: board/mediatek/mt7623
- F: include/configs/mt7623.h
- F: configs/mt7623n_bpir2_defconfig
-+
-+UNIELEC U7623
-+M: Ryder Lee <ryder.lee@mediatek.com>
-+M: David Woodhouse <dwmw2@infradead.org>
-+S: Maintained
-+F: arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
-+F: configs/mt7623a_unielec_u7623_02_defconfig
-diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
-new file mode 100644
-index 0000000000..72b5f31092
---- /dev/null
-+++ b/configs/mt7623a_unielec_u7623_02_defconfig
-@@ -0,0 +1,54 @@
-+CONFIG_ARM=y
-+CONFIG_SYS_THUMB_BUILD=y
-+CONFIG_ARCH_MEDIATEK=y
-+CONFIG_SYS_TEXT_BASE=0x81e00000
-+CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_ENV_SIZE=0x1000
-+CONFIG_ENV_OFFSET=0x100000
-+CONFIG_TARGET_MT7623=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DISTRO_DEFAULTS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_BOOTDELAY=3
-+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-+CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
-+# CONFIG_DISPLAY_BOARDINFO is not set
-+CONFIG_SYS_PROMPT="U-Boot> "
-+CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_XIMG is not set
-+CONFIG_CMD_GPIO=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_READ=y
-+# CONFIG_CMD_SETEXPR is not set
-+# CONFIG_CMD_NFS is not set
-+CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_MMC=y
-+# CONFIG_MMC_QUIRKS is not set
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_MMC_HS400_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7623=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_SYSRESET=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_TIMER=y
-+CONFIG_MTK_TIMER=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZMA=y
---
-2.26.2
-