--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -1092,7 +1092,8 @@ static int m25p_probe(struct spi_device
+@@ -1093,7 +1093,8 @@ static int m25p_probe(struct spi_device
/* partitions should match sector boundaries; and it may be good to
* use readonly partitions for writeprotected sectors (BP2..BP0).
*/
/*
* Write an address range to the flash chip. Data must be written in
* FLASH_PAGESIZE chunks. The address range may be any size provided
-@@ -987,6 +1009,9 @@ static int m25p_probe(struct spi_device
+@@ -988,6 +1010,9 @@ static int m25p_probe(struct spi_device
return -ENOMEM;
}
-From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From 994ed2c168ce27483724cd0c387f752d1ccd30e7 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+Subject: [PATCH 20/45] MIPS: BCM63XX: add a new cpu variant helper
---
arch/mips/bcm63xx/cpu.c | 10 ++++++++++
-From 9cd8b4a2ee9d0e6a5b91845bdd6f4b7e114fc8c4 Mon Sep 17 00:00:00 2001
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
1 file changed, 2 insertions(+)
#define PERF_REV_REG 0x0
#define REV_CHIPID_SHIFT 16
#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT 8
++#define REV_VARID_SHIFT 12
+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
#define REV_REVID_SHIFT 0
#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
--- /dev/null
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -304,6 +304,7 @@ void __init bcm63xx_cpu_init(void)
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+ chipid_reg = 0;
+@@ -343,6 +344,7 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -352,6 +354,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6328_CPU_ID:
+ bcm63xx_regs_base = bcm6328_regs_base;
+ bcm63xx_irqs = bcm6328_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM63281_CPU_ID;
++ else if (varid == 3)
++ bcm63xx_cpu_variant = BCM63283_CPU_ID;
++ else
++ pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ break;
+ case BCM6338_CPU_ID:
+ bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,8 @@
+ */
+ #define BCM3368_CPU_ID 0x3368
+ #define BCM6328_CPU_ID 0x6328
++#define BCM63281_CPU_ID 0x63281
++#define BCM63283_CPU_ID 0x63283
+ #define BCM6338_CPU_ID 0x6338
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
+++ /dev/null
-From 6c8d94aaf5e2f0a3327e4f69ccd980bd5617f925 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 42/53] MIPS: BCM63XX: detect bcm6328 variants
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -304,6 +304,7 @@ void __init bcm63xx_cpu_init(void)
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
- chipid_reg = 0;
-@@ -343,6 +344,7 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -352,6 +354,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6328_CPU_ID:
- bcm63xx_regs_base = bcm6328_regs_base;
- bcm63xx_irqs = bcm6328_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+ else if (varid == 3)
-+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- break;
- case BCM6338_CPU_ID:
- bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,8 @@
- */
- #define BCM3368_CPU_ID 0x3368
- #define BCM6328_CPU_ID 0x6328
-+#define BCM63281_CPU_ID 0x63281
-+#define BCM63283_CPU_ID 0x63283
- #define BCM6338_CPU_ID 0x6338
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
-@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
-- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \
-From dc48adb13a99086d1f484d3379a918626c5b1658 Mon Sep 17 00:00:00 2001
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 43/53] MIPS: BCM63XX: detect BCM6362 variants
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
---
arch/mips/bcm63xx/cpu.c | 8 ++++++++
+++ /dev/null
-From 311b0246d51e09d13464e76abb0e231c855dd333 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 44/53] MIPS: BCM63XX: add support for BCM6368 variants
-
----
- arch/mips/bcm63xx/cpu.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void)
-
- break;
- case BCM6368_CPU_ID:
-+ case BCM6369_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
- bcm63xx_irqs = bcm6368_irqs;
-+
-+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+ bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-+#define BCM6369_CPU_ID 0x6369
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
--- /dev/null
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void)
+
+ break;
+ case BCM6368_CPU_ID:
++ case BCM6369_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+ bcm63xx_irqs = bcm6368_irqs;
++
++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
++#define BCM6369_CPU_ID 0x6369
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
+#define REV_LONG_CHIPID_SHIFT 12
+#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT 8
+ #define REV_VARID_SHIFT 12
#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
#define REV_REVID_SHIFT 0
@@ -211,6 +213,52 @@
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -976,6 +976,9 @@ static int m25p_probe(struct spi_device
+@@ -977,6 +977,9 @@ static int m25p_probe(struct spi_device
dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
}
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -1313,7 +1313,8 @@ static int m25p_probe(struct spi_device
+@@ -1314,7 +1314,8 @@ static int m25p_probe(struct spi_device
/* partitions should match sector boundaries; and it may be good to
* use readonly partitions for writeprotected sectors (BP2..BP0).
*/
/*
* Write an address range to the flash chip. Data must be written in
* FLASH_PAGESIZE chunks. The address range may be any size provided
-@@ -1158,6 +1180,9 @@ static int m25p_probe(struct spi_device
+@@ -1159,6 +1181,9 @@ static int m25p_probe(struct spi_device
if (!flash->command)
return -ENOMEM;
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
-@@ -639,7 +639,7 @@ static inline u32 hc32_to_cpup (const st
+@@ -641,7 +641,7 @@ static inline u32 hc32_to_cpup (const st
* some big-endian SOC implementations. Same thing happens with PSW access.
*/
-From 9cd8b4a2ee9d0e6a5b91845bdd6f4b7e114fc8c4 Mon Sep 17 00:00:00 2001
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
1 file changed, 2 insertions(+)
#define PERF_REV_REG 0x0
#define REV_CHIPID_SHIFT 16
#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT 8
++#define REV_VARID_SHIFT 12
+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
#define REV_REVID_SHIFT 0
#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
--- /dev/null
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -306,6 +306,7 @@ void __init bcm63xx_cpu_init(void)
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+ chipid_reg = 0;
+@@ -345,6 +346,7 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -354,6 +356,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6328_CPU_ID:
+ bcm63xx_regs_base = bcm6328_regs_base;
+ bcm63xx_irqs = bcm6328_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM63281_CPU_ID;
++ else if (varid == 3)
++ bcm63xx_cpu_variant = BCM63283_CPU_ID;
++ else
++ pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ break;
+ case BCM6338_CPU_ID:
+ bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,8 @@
+ */
+ #define BCM3368_CPU_ID 0x3368
+ #define BCM6328_CPU_ID 0x6328
++#define BCM63281_CPU_ID 0x63281
++#define BCM63283_CPU_ID 0x63283
+ #define BCM6338_CPU_ID 0x6338
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
+++ /dev/null
-From 6c8d94aaf5e2f0a3327e4f69ccd980bd5617f925 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 42/53] MIPS: BCM63XX: detect bcm6328 variants
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -306,6 +306,7 @@ void __init bcm63xx_cpu_init(void)
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
- chipid_reg = 0;
-@@ -345,6 +346,7 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -354,6 +356,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6328_CPU_ID:
- bcm63xx_regs_base = bcm6328_regs_base;
- bcm63xx_irqs = bcm6328_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+ else if (varid == 3)
-+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- break;
- case BCM6338_CPU_ID:
- bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,8 @@
- */
- #define BCM3368_CPU_ID 0x3368
- #define BCM6328_CPU_ID 0x6328
-+#define BCM63281_CPU_ID 0x63281
-+#define BCM63283_CPU_ID 0x63283
- #define BCM6338_CPU_ID 0x6338
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
-@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
-- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \
-From dc48adb13a99086d1f484d3379a918626c5b1658 Mon Sep 17 00:00:00 2001
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 43/53] MIPS: BCM63XX: detect BCM6362 variants
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
---
arch/mips/bcm63xx/cpu.c | 8 ++++++++
+++ /dev/null
-From 311b0246d51e09d13464e76abb0e231c855dd333 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 44/53] MIPS: BCM63XX: add support for BCM6368 variants
-
----
- arch/mips/bcm63xx/cpu.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -394,8 +394,12 @@ void __init bcm63xx_cpu_init(void)
-
- break;
- case BCM6368_CPU_ID:
-+ case BCM6369_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
- bcm63xx_irqs = bcm6368_irqs;
-+
-+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+ bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-+#define BCM6369_CPU_ID 0x6369
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
--- /dev/null
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -394,8 +394,12 @@ void __init bcm63xx_cpu_init(void)
+
+ break;
+ case BCM6368_CPU_ID:
++ case BCM6369_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+ bcm63xx_irqs = bcm6368_irqs;
++
++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
++#define BCM6369_CPU_ID 0x6369
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
+#define REV_LONG_CHIPID_SHIFT 12
+#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT 8
+ #define REV_VARID_SHIFT 12
#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
#define REV_REVID_SHIFT 0
@@ -211,6 +213,52 @@
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -1149,6 +1149,9 @@ static int m25p_probe(struct spi_device
+@@ -1150,6 +1150,9 @@ static int m25p_probe(struct spi_device
dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
}