realtek: enable uart1 on the devices with PoE support in 5.10

On the devices with PoE support, the secondary UART (uart1) on the SoC
is used to communicate between the SoC and controller.

Enable the secondary UART on the following devices:

- D-Link DGS-1210-10P
- Netgear GS110TPP v1
- Netgear GS310TP v1
- ZyXEL GS1900-8HP v1/v2
- ZyXEL GS1900-10HP
- ZyXEL GS1900-24HP v2

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>

diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts
index 646f4ed51600a0c9e2cb2dfeb15345039449c15a..8382d35a9da16039c0e009ff424c330e32a4d1ff 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts
+++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts
@@ -6,3 +6,7 @@
        compatible = "netgear,gs110tpp-v1", "realtek,rtl838x-soc";
        model = "Netgear GS110TPP v1";
 };
+
+&uart1 {
+       status = "okay";
+};

diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs310tp-v1.dts b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs310tp-v1.dts
index e3f59bde69aa6b2f9fd8641eaefb499ab75030c4..dacd504ac49822188e7a905bc80d157017acb89f 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs310tp-v1.dts
+++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs310tp-v1.dts
@@ -8,6 +8,10 @@
 
 };
 
+&uart1 {
+       status = "okay";
+};
+
 &mdio {
        INTERNAL_PHY(24)
        INTERNAL_PHY(26)

diff --git a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-10hp.dts
index c16028788ea4e86ace725b7dc2cedbb046b894cc..82df6789a95c01ad488cc984aedb171e481c7654 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-10hp.dts
+++ b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-10hp.dts
@@ -45,6 +45,10 @@
        };
 };
 
+&uart1 {
+       status = "okay";
+};
+
 &mdio {
        INTERNAL_PHY(24)
        INTERNAL_PHY(26)

diff --git a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v1.dts b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v1.dts
index 0d9b7c97c0d5729c3797fd2337637187d03aa10a..5ee340eac682428ae7d2f6c5765239791a17ce50 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v1.dts
+++ b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v1.dts
@@ -6,3 +6,7 @@
        compatible = "zyxel,gs1900-8hp-v1", "realtek,rtl838x-soc";
        model = "ZyXEL GS1900-8HP v1 Switch";
 };
+
+&uart1 {
+       status = "okay";
+};

diff --git a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v2.dts b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v2.dts
index cdc4aed6d19729fad1778fcb5ec401e785218bc2..0768462255566724314db3c22dd74e4f0784956f 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v2.dts
+++ b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8hp-v2.dts
@@ -6,3 +6,7 @@
        compatible = "zyxel,gs1900-8hp-v2", "realtek,rtl838x-soc";
        model = "ZyXEL GS1900-8HP v2 Switch";
 };
+
+&uart1 {
+       status = "okay";
+};

diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-10p.dts b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-10p.dts
index f347660283c456d829caa672a01c008b1a1e4ff6..119eaadc16e641297fe22893da948f4c65a45d03 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-10p.dts
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-10p.dts
@@ -102,6 +102,10 @@
        };
 };
 
+&uart1 {
+       status = "okay";
+};
+
 &ethernet0 {
        mdio: mdio-bus {
                compatible = "realtek,rtl838x-mdio";

diff --git a/target/linux/realtek/dts-5.10/rtl8382_zyxel_gs1900-24hp-v2.dts b/target/linux/realtek/dts-5.10/rtl8382_zyxel_gs1900-24hp-v2.dts
index c16152521ee06d6dad972eadbb44fe4e3f2d486f..7b6a9a1e7fd38845922bef34732350bf43c884c6 100644 (file)
--- a/target/linux/realtek/dts-5.10/rtl8382_zyxel_gs1900-24hp-v2.dts
+++ b/target/linux/realtek/dts-5.10/rtl8382_zyxel_gs1900-24hp-v2.dts
@@ -45,6 +45,10 @@
        };
 };
 
+&uart1 {
+       status = "okay";
+};
+
 &mdio {
        EXTERNAL_PHY(0)
        EXTERNAL_PHY(1)