* corresponding to the desired security state after the next ERET.
*/
sp_min_prepare_next_image_entry();
+
+ /*
+ * Perform any platform specific runtime setup prior to cold boot exit
+ * from SP_MIN.
+ */
+ sp_min_plat_runtime_setup();
}
/******************************************************************************
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
******************************************************************************/
void sp_min_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2);
-void sp_min_plat_arch_setup(void);
void sp_min_platform_setup(void);
+void sp_min_plat_runtime_setup(void);
+void sp_min_plat_arch_setup(void);
entry_point_info_t *sp_min_plat_get_bl33_ep_info(void);
#endif /* __PLATFORM_SP_MIN_H__ */
#define PLAT_ARM_BL31_RUN_UART_BASE SOC_CSS_UART1_BASE
#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
+#define PLAT_ARM_SP_MIN_RUN_UART_BASE SOC_CSS_UART1_BASE
+#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
+
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
/* SP_MIN utility functions */
void arm_sp_min_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2);
+void arm_sp_min_plat_runtime_setup(void);
/* FIP TOC validity check */
int arm_io_is_toc_valid(void);
#define PLAT_ARM_BL31_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
+#define PLAT_ARM_SP_MIN_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
+#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
+
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
plat_arm_interconnect_enter_coherency();
}
+/*******************************************************************************
+ * Perform any SP_MIN platform runtime setup prior to SP_MIN exit.
+ * Common to ARM standard platforms.
+ ******************************************************************************/
+void arm_sp_min_plat_runtime_setup(void)
+{
+ /* Initialize the runtime console */
+ console_init(PLAT_ARM_SP_MIN_RUN_UART_BASE,
+ PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ, ARM_CONSOLE_BAUDRATE);
+}
+
/*******************************************************************************
* Perform platform specific setup for SP_MIN
******************************************************************************/
plat_arm_pwrc_setup();
}
+void sp_min_plat_runtime_setup(void)
+{
+ arm_sp_min_plat_runtime_setup();
+}
+
/*******************************************************************************
* Perform the very early platform specific architectural setup here. At the
* moment this only initializes the MMU
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <console.h>
#include <platform.h>
#include <xlat_mmu_helpers.h>
* platforms but may also be overridden by a platform if required.
*/
#pragma weak bl32_plat_enable_mmu
+#pragma weak sp_min_plat_runtime_setup
void bl32_plat_enable_mmu(uint32_t flags)
{
enable_mmu_secure(flags);
}
+
+void sp_min_plat_runtime_setup(void)
+{
+ /*
+ * Finish the use of console driver in SP_MIN so that any runtime logs
+ * from SP_MIN will be suppressed.
+ */
+ console_uninit();
+}