clk: bcm2835: added missing clock register definitions

Added missing CTRL and DIV clock register definitions for:
PCM, SLIM, TCNT, TEC, TD0, TD1

Register information taken from:
https://rawgit.com/msperl/rpi-registers/master/rpi-registers.html#CM
which extracted the information from the header files shared by
Broadcom/rpi foundation in this file:
http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 353e43835d5dbdf48d40ee9ae8135e9d177d0d58..5747a9d17c740f15a348eaf2adf3692d1ce43e84 100644 (file)
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -88,10 +88,23 @@
 #define CM_HSMDIV              0x08c
 #define CM_OTPCTL              0x090
 #define CM_OTPDIV              0x094
+#define CM_PCMCTL              0x098
+#define CM_PCMDIV              0x09c
 #define CM_PWMCTL              0x0a0
 #define CM_PWMDIV              0x0a4
+#define CM_SLIMCTL             0x0a8
+#define CM_SLIMDIV             0x0ac
 #define CM_SMICTL              0x0b0
 #define CM_SMIDIV              0x0b4
+/* no definition for 0x0b8  and 0x0bc */
+#define CM_TCNTCTL             0x0c0
+#define CM_TCNTDIV             0x0c4
+#define CM_TECCTL              0x0c8
+#define CM_TECDIV              0x0cc
+#define CM_TD0CTL              0x0d0
+#define CM_TD0DIV              0x0d4
+#define CM_TD1CTL              0x0d8
+#define CM_TD1DIV              0x0dc
 #define CM_TSENSCTL            0x0e0
 #define CM_TSENSDIV            0x0e4
 #define CM_TIMERCTL            0x0e8