imx: spl: Update NAND bootmode detection bit

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 6c20f28e10020a3189cfb14f54c78f0112fd963a..81fc0ca252cb76c480ff6a37022e1977d2c1d60a 100644 (file)
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -63,8 +63,8 @@ u32 spl_boot_device(void)
        case 0x6:
        case 0x7:
                return BOOT_DEVICE_MMC1;
-       /* NAND Flash: 8.5.2 */
-       case 0x8 ... 0xf:
+       /* NAND Flash: 8.5.2, Table 8-10 */
+       case 0x8:
                return BOOT_DEVICE_NAND;
        }
        return BOOT_DEVICE_NONE;