ar71xx: kernel: enable PCI on QCA9556 SoC
authorRoger Pueyo Centelles <roger.pueyo@guifi.net>
Mon, 8 Jan 2018 11:30:28 +0000 (12:30 +0100)
committerDaniel Golle <daniel@makrotopia.org>
Mon, 15 Jan 2018 03:14:18 +0000 (04:14 +0100)
This patch enables the PCI bus on the QCA9556 SoC, the same way it is
done on the same family SoC QCA9558.

Tested on a MikroTik RouterBoard wAPG-5HacT2HnD (wAP AC).

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch [new file with mode: 0644]
target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch [new file with mode: 0644]

diff --git a/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch b/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch
new file mode 100644 (file)
index 0000000..3a6438e
--- /dev/null
@@ -0,0 +1,12 @@
+--- a/arch/mips/ath79/pci.c
++++ b/arch/mips/ath79/pci.c
+@@ -324,7 +324,8 @@ int __init ath79_register_pci(void)
+                                                QCA953X_PCI_MEM_SIZE,
+                                                0,
+                                                ATH79_IP2_IRQ(0));
+-      } else if (soc_is_qca9558()) {
++      } else if (soc_is_qca9558() ||
++                 soc_is_qca9556()) {
+               pdev = ath79_register_pci_ar724x(0,
+                                                QCA955X_PCI_CFG_BASE0,
+                                                QCA955X_PCI_CTRL_BASE0,
diff --git a/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch b/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch
new file mode 100644 (file)
index 0000000..3a6438e
--- /dev/null
@@ -0,0 +1,12 @@
+--- a/arch/mips/ath79/pci.c
++++ b/arch/mips/ath79/pci.c
+@@ -324,7 +324,8 @@ int __init ath79_register_pci(void)
+                                                QCA953X_PCI_MEM_SIZE,
+                                                0,
+                                                ATH79_IP2_IRQ(0));
+-      } else if (soc_is_qca9558()) {
++      } else if (soc_is_qca9558() ||
++                 soc_is_qca9556()) {
+               pdev = ath79_register_pci_ar724x(0,
+                                                QCA955X_PCI_CFG_BASE0,
+                                                QCA955X_PCI_CTRL_BASE0,